Lines Matching defs:gwdt
55 #define DRV_NAME "sbsa-gwdt"
121 struct sbsa_gwdt *gwdt = watchdog_get_drvdata(wdd);
127 writel(gwdt->clk * timeout,
128 gwdt->control_base + SBSA_GWDT_WOR);
135 writel(gwdt->clk / 2 * timeout,
136 gwdt->control_base + SBSA_GWDT_WOR);
143 struct sbsa_gwdt *gwdt = watchdog_get_drvdata(wdd);
152 !(readl(gwdt->control_base + SBSA_GWDT_WCS) & SBSA_GWDT_WCS_WS0))
153 timeleft += readl(gwdt->control_base + SBSA_GWDT_WOR);
155 timeleft += lo_hi_readq(gwdt->control_base + SBSA_GWDT_WCV) -
158 do_div(timeleft, gwdt->clk);
165 struct sbsa_gwdt *gwdt = watchdog_get_drvdata(wdd);
171 writel(0, gwdt->refresh_base + SBSA_GWDT_WRR);
178 struct sbsa_gwdt *gwdt = watchdog_get_drvdata(wdd);
181 writel(SBSA_GWDT_WCS_EN, gwdt->control_base + SBSA_GWDT_WCS);
188 struct sbsa_gwdt *gwdt = watchdog_get_drvdata(wdd);
191 writel(0, gwdt->control_base + SBSA_GWDT_WCS);
225 struct sbsa_gwdt *gwdt;
229 gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
230 if (!gwdt)
232 platform_set_drvdata(pdev, gwdt);
247 gwdt->clk = arch_timer_get_cntfrq();
248 gwdt->refresh_base = rf_base;
249 gwdt->control_base = cf_base;
251 wdd = &gwdt->wdd;
256 wdd->max_hw_heartbeat_ms = U32_MAX / gwdt->clk * 1000;
258 watchdog_set_drvdata(wdd, gwdt);
281 pdev->name, gwdt)) {
311 wdd->timeout, gwdt->clk, action,
320 struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
322 if (watchdog_active(&gwdt->wdd))
323 sbsa_gwdt_stop(&gwdt->wdd);
331 struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
333 if (watchdog_active(&gwdt->wdd))
334 sbsa_gwdt_start(&gwdt->wdd);
344 { .compatible = "arm,sbsa-gwdt", },