Lines Matching refs:wdt
52 #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
54 #define wdt_read(wdt, field) \
55 readl_relaxed((wdt)->reg_base + (field))
60 static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
67 while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
69 writel_relaxed(val, wdt->reg_base + field);
70 wdt->last_ping = jiffies;
73 static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
75 if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
77 writel_relaxed(val, wdt->reg_base + field);
78 wdt->last_ping = jiffies;
83 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
85 if (wdt->sam9x60_support) {
86 writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IER);
87 wdt->mr &= ~AT91_SAM9X60_WDDIS;
89 wdt->mr &= ~AT91_WDT_WDDIS;
91 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
98 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
100 if (wdt->sam9x60_support) {
101 writel_relaxed(wdt->ir, wdt->reg_base + AT91_SAM9X60_IDR);
102 wdt->mr |= AT91_SAM9X60_WDDIS;
104 wdt->mr |= AT91_WDT_WDDIS;
106 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
113 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
115 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
123 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
126 if (wdt->sam9x60_support) {
127 wdt_write(wdt, AT91_SAM9X60_WLR,
134 wdt->mr &= ~AT91_WDT_WDV;
135 wdt->mr |= AT91_WDT_SET_WDV(value);
145 wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
167 struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
170 if (wdt->sam9x60_support)
171 reg = wdt_read(wdt, AT91_SAM9X60_ISR);
173 reg = wdt_read(wdt, AT91_WDT_SR);
184 static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
188 if (wdt->sam9x60_support)
189 wdt->mr = AT91_SAM9X60_WDDIS;
191 wdt->mr = AT91_WDT_WDDIS;
195 wdt->need_irq = true;
198 wdt->mr |= AT91_WDT_WDIDLEHLT;
201 wdt->mr |= AT91_WDT_WDDBGHLT;
206 static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
218 reg = wdt_read(wdt, AT91_WDT_MR);
219 if (wdt->sam9x60_support && (!(reg & AT91_SAM9X60_WDDIS)))
220 wdt_write_nosleep(wdt, AT91_WDT_MR,
222 else if (!wdt->sam9x60_support &&
224 wdt_write_nosleep(wdt, AT91_WDT_MR,
228 if (wdt->sam9x60_support) {
229 if (wdt->need_irq)
230 wdt->ir = AT91_SAM9X60_PERINT;
232 wdt->mr |= AT91_SAM9X60_PERIODRST;
234 wdt_write(wdt, AT91_SAM9X60_IER, wdt->ir);
235 wdt_write(wdt, AT91_SAM9X60_WLR, AT91_SAM9X60_SET_COUNTER(val));
237 wdt->mr |= AT91_WDT_SET_WDD(WDT_SEC2TICKS(MAX_WDT_TIMEOUT));
238 wdt->mr |= AT91_WDT_SET_WDV(val);
240 if (wdt->need_irq)
241 wdt->mr |= AT91_WDT_WDFIEN;
243 wdt->mr |= AT91_WDT_WDRSTEN;
246 wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
255 struct sama5d4_wdt *wdt;
260 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
261 if (!wdt)
264 wdd = &wdt->wdd;
270 wdt->last_ping = jiffies;
271 wdt->sam9x60_support = of_device_is_compatible(dev->of_node,
272 "microchip,sam9x60-wdt");
274 watchdog_set_drvdata(wdd, wdt);
280 wdt->reg_base = regs;
282 ret = of_sama5d4_wdt_init(dev->of_node, wdt);
286 if (wdt->need_irq) {
290 wdt->need_irq = false;
294 if (wdt->need_irq) {
306 ret = sama5d4_wdt_init(wdt);
317 platform_set_drvdata(pdev, wdt);
327 .compatible = "atmel,sama5d4-wdt",
330 .compatible = "microchip,sam9x60-wdt",
339 struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
341 if (watchdog_active(&wdt->wdd))
342 sama5d4_wdt_stop(&wdt->wdd);
349 struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
356 sama5d4_wdt_init(wdt);
358 if (watchdog_active(&wdt->wdd))
359 sama5d4_wdt_start(&wdt->wdd);