Lines Matching refs:val
77 u32 val;
81 val = inl(TCO_CNT(tcobase));
82 val &= ~TCO_CNT_TCOHALT;
83 outl(val, TCO_CNT(tcobase));
89 u32 val;
93 val = inl(TCO_CNT(tcobase));
94 val |= TCO_CNT_TCOHALT;
95 outl(val, TCO_CNT(tcobase));
113 u8 val;
130 val = inb(TCO_TMR(tcobase));
131 val &= 0xc0;
132 val |= tmrval;
133 outb(val, TCO_TMR(tcobase));
134 val = inb(TCO_TMR(tcobase));
136 if ((val & 0x3f) != tmrval)
309 u32 val;
323 pci_read_config_dword(tco_pci, 0x64, &val);
324 val &= 0xffff;
325 if (val == 0x0001 || val == 0x0000) {
330 val &= 0xff00;
331 tcobase = val + 0x40;
354 val = inl(MCP51_SMI_EN(tcobase));
355 val &= ~MCP51_SMI_EN_TCO;
356 outl(val, MCP51_SMI_EN(tcobase));
357 val = inl(MCP51_SMI_EN(tcobase));
359 if (val & MCP51_SMI_EN_TCO) {
365 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
366 val |= MCP51_SMBUS_SETUP_B_TCO_REBOOT;
367 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
368 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
369 if (!(val & MCP51_SMBUS_SETUP_B_TCO_REBOOT)) {
429 u32 val;
436 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
437 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
438 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);
439 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
440 if (val & MCP51_SMBUS_SETUP_B_TCO_REBOOT) {
459 u32 val;
465 pci_read_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, &val);
466 val &= ~MCP51_SMBUS_SETUP_B_TCO_REBOOT;
467 pci_write_config_dword(tco_pci, MCP51_SMBUS_SETUP_B, val);