Lines Matching refs:base
51 void __iomem *base;
55 static int imx7ulp_wdt_wait(void __iomem *base, u32 mask)
57 u32 val = readl(base + WDOG_CS);
59 if (!(val & mask) && readl_poll_timeout_atomic(base + WDOG_CS, val,
71 u32 val = readl(wdt->base + WDOG_CS);
75 writel(UNLOCK, wdt->base + WDOG_CNT);
76 ret = imx7ulp_wdt_wait(wdt->base, WDOG_CS_ULK);
80 writel(val | WDOG_CS_EN, wdt->base + WDOG_CS);
82 writel(val & ~WDOG_CS_EN, wdt->base + WDOG_CS);
83 imx7ulp_wdt_wait(wdt->base, WDOG_CS_RCS);
91 static bool imx7ulp_wdt_is_enabled(void __iomem *base)
93 u32 val = readl(base + WDOG_CS);
102 writel(REFRESH, wdt->base + WDOG_CNT);
125 writel(UNLOCK, wdt->base + WDOG_CNT);
126 ret = imx7ulp_wdt_wait(wdt->base, WDOG_CS_ULK);
129 writel(val, wdt->base + WDOG_TOVAL);
130 imx7ulp_wdt_wait(wdt->base, WDOG_CS_RCS);
176 static int imx7ulp_wdt_init(void __iomem *base, unsigned int timeout)
183 writel_relaxed(UNLOCK_SEQ0, base + WDOG_CNT);
184 writel_relaxed(UNLOCK_SEQ1, base + WDOG_CNT);
185 ret = imx7ulp_wdt_wait(base, WDOG_CS_ULK);
190 writel(timeout, base + WDOG_TOVAL);
194 writel(val, base + WDOG_CS);
195 imx7ulp_wdt_wait(base, WDOG_CS_RCS);
221 imx7ulp_wdt->base = devm_platform_ioremap_resource(pdev, 0);
222 if (IS_ERR(imx7ulp_wdt->base))
223 return PTR_ERR(imx7ulp_wdt->base);
251 ret = imx7ulp_wdt_init(imx7ulp_wdt->base, wdog->timeout * WDOG_CLOCK_RATE);
280 if (imx7ulp_wdt_is_enabled(imx7ulp_wdt->base))
281 imx7ulp_wdt_init(imx7ulp_wdt->base, timeout);