Lines Matching refs:ctrl
19 u32 ctrl;
106 wdt->ctrl |= WDT_CTRL_ENABLE;
111 writel(wdt->ctrl, wdt->base + WDT_CTRL);
127 wdt->ctrl &= ~WDT_CTRL_ENABLE;
128 writel(wdt->ctrl, wdt->base + WDT_CTRL);
163 wdt->ctrl &= ~WDT_CTRL_BOOT_SECONDARY;
285 wdt->ctrl = WDT_CTRL_1MHZ_CLK;
293 wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC | WDT_CTRL_RESET_SYSTEM;
296 wdt->ctrl |= WDT_CTRL_RESET_MODE_ARM_CPU |
299 wdt->ctrl |= WDT_CTRL_RESET_MODE_SOC |
302 wdt->ctrl |= WDT_CTRL_RESET_MODE_FULL_CHIP |
308 wdt->ctrl |= WDT_CTRL_WDT_EXT;
310 wdt->ctrl |= WDT_CTRL_BOOT_SECONDARY;
315 * write wdt->ctrl to WDT_CTRL to ensure the watchdog's