Lines Matching defs:DS1WM_INT_EN
34 #define DS1WM_INT_EN 0x03 /* R/W interrupt enable */
185 u8 inten = ds1wm_read_register(ds1wm_data, DS1WM_INT_EN);
192 DS1WM_INT_EN, ds1wm_data->int_en_reg_none);
216 ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, inten);
228 ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, DS1WM_INTEN_EPD |
257 ds1wm_write_register(ds1wm_data, DS1WM_INT_EN,
282 ds1wm_write_register(ds1wm_data, DS1WM_INT_EN, intEnable);
338 ds1wm_write_register(ds1wm_data, DS1WM_INT_EN,
567 inten = ds1wm_read_register(ds1wm_data, DS1WM_INT_EN);
569 DS1WM_INT_EN, ds1wm_data->int_en_reg_none);