Lines Matching defs:temp_ctl
476 unsigned int temp_ctl = 0;
539 temp_ctl = ioread32be(bridge->base + TSI148_LCSR_IT[i] +
541 temp_ctl &= ~TSI148_LCSR_ITAT_EN;
542 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +
560 temp_ctl &= ~TSI148_LCSR_ITAT_2eSSTM_M;
563 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_160;
566 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_267;
569 temp_ctl |= TSI148_LCSR_ITAT_2eSSTM_320;
574 temp_ctl &= ~(0x1F << 7);
576 temp_ctl |= TSI148_LCSR_ITAT_BLT;
578 temp_ctl |= TSI148_LCSR_ITAT_MBLT;
580 temp_ctl |= TSI148_LCSR_ITAT_2eVME;
582 temp_ctl |= TSI148_LCSR_ITAT_2eSST;
584 temp_ctl |= TSI148_LCSR_ITAT_2eSSTB;
587 temp_ctl &= ~TSI148_LCSR_ITAT_AS_M;
588 temp_ctl |= addr;
590 temp_ctl &= ~0xF;
592 temp_ctl |= TSI148_LCSR_ITAT_SUPR ;
594 temp_ctl |= TSI148_LCSR_ITAT_NPRIV;
596 temp_ctl |= TSI148_LCSR_ITAT_PGM;
598 temp_ctl |= TSI148_LCSR_ITAT_DATA;
601 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +
605 temp_ctl |= TSI148_LCSR_ITAT_EN;
607 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_IT[i] +
813 unsigned int temp_ctl = 0;
903 temp_ctl = ioread32be(bridge->base + TSI148_LCSR_OT[i] +
905 temp_ctl &= ~TSI148_LCSR_OTAT_EN;
906 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
910 temp_ctl &= ~TSI148_LCSR_OTAT_2eSSTM_M;
913 temp_ctl |= TSI148_LCSR_OTAT_2eSSTM_160;
916 temp_ctl |= TSI148_LCSR_OTAT_2eSSTM_267;
919 temp_ctl |= TSI148_LCSR_OTAT_2eSSTM_320;
925 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
926 temp_ctl |= TSI148_LCSR_OTAT_TM_BLT;
929 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
930 temp_ctl |= TSI148_LCSR_OTAT_TM_MBLT;
933 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
934 temp_ctl |= TSI148_LCSR_OTAT_TM_2eVME;
937 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
938 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSST;
943 temp_ctl &= ~TSI148_LCSR_OTAT_TM_M;
944 temp_ctl |= TSI148_LCSR_OTAT_TM_2eSSTB;
948 temp_ctl &= ~TSI148_LCSR_OTAT_DBW_M;
951 temp_ctl |= TSI148_LCSR_OTAT_DBW_16;
954 temp_ctl |= TSI148_LCSR_OTAT_DBW_32;
964 temp_ctl &= ~TSI148_LCSR_OTAT_AMODE_M;
967 temp_ctl |= TSI148_LCSR_OTAT_AMODE_A16;
970 temp_ctl |= TSI148_LCSR_OTAT_AMODE_A24;
973 temp_ctl |= TSI148_LCSR_OTAT_AMODE_A32;
976 temp_ctl |= TSI148_LCSR_OTAT_AMODE_A64;
979 temp_ctl |= TSI148_LCSR_OTAT_AMODE_CRCSR;
982 temp_ctl |= TSI148_LCSR_OTAT_AMODE_USER1;
985 temp_ctl |= TSI148_LCSR_OTAT_AMODE_USER2;
988 temp_ctl |= TSI148_LCSR_OTAT_AMODE_USER3;
991 temp_ctl |= TSI148_LCSR_OTAT_AMODE_USER4;
1001 temp_ctl &= ~(3<<4);
1003 temp_ctl |= TSI148_LCSR_OTAT_SUP;
1005 temp_ctl |= TSI148_LCSR_OTAT_PGM;
1022 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +
1026 temp_ctl |= TSI148_LCSR_OTAT_EN;
1028 iowrite32be(temp_ctl, bridge->base + TSI148_LCSR_OT[i] +