Lines Matching refs:x00
18 {VIASR, SR2A, 0xFF, 0x00},
19 {VIACR, CR32, 0xFF, 0x00},
20 {VIACR, CR33, 0xFF, 0x00},
21 {VIACR, CR35, 0xFF, 0x00},
22 {VIACR, CR36, 0x08, 0x00},
23 {VIACR, CR69, 0xFF, 0x00},
25 {VIACR, CR6B, 0xFF, 0x00},
27 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
31 {VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */
36 {VIACR, CR96, 0xFF, 0x00},
37 {VIACR, CR97, 0xFF, 0x00},
38 {VIACR, CR99, 0xFF, 0x00},
39 {VIACR, CR9B, 0xFF, 0x00}
51 {VIASR, SR1F, 0xFF, 0x00},
54 {VIASR, SR2A, 0x0F, 0x00},
57 {VIASR, SR40, 0xF7, 0x00},
59 {VIACR, CR32, 0xFF, 0x00},
60 {VIACR, CR33, 0x7F, 0x00},
61 {VIACR, CR35, 0xFF, 0x00},
64 {VIACR, CR42, 0xFF, 0x00},
65 {VIACR, CR55, 0x80, 0x00},
66 {VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/
68 {VIACR, CR69, 0xFF, 0x00},
70 {VIACR, CR6B, 0xFF, 0x00},
71 {VIACR, CR77, 0xFF, 0x00}, /* LCD scaling Factor */
72 {VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */
73 {VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */
74 {VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */
76 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
85 {VIACR, CR96, 0xFF, 0x00},
86 {VIACR, CR97, 0xFF, 0x00},
87 {VIACR, CR99, 0xFF, 0x00},
88 {VIACR, CR9B, 0xFF, 0x00},
99 {VIASR, SR1F, 0xFF, 0x00}, /* Memory Control 0 */
102 {VIASR, SR20, 0xFF, 0x00}, /* Sequencer Arbiter Control 0 */
103 {VIASR, SR21, 0xFF, 0x00}, /* Sequencer Arbiter Control 1 */
105 {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */
108 {VIACR, CR33, 0xFF, 0x00},
109 {VIACR, CR55, 0x80, 0x00},
110 {VIACR, CR5D, 0x80, 0x00},
115 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
121 {VIACR, CR8F, 0xFF, 0x00}, /* LCD Power Sequence Control 4 */
139 {VIASR, SR2A, 0xFF, 0x00},
141 {VIACR, CR32, 0xFF, 0x00},
142 {VIACR, CR33, 0xFF, 0x00},
143 {VIACR, CR35, 0xFF, 0x00},
144 {VIACR, CR36, 0x08, 0x00},
145 {VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
146 {VIACR, CR69, 0xFF, 0x00},
148 {VIACR, CR6B, 0xFF, 0x00},
150 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
160 {VIACR, CR96, 0xFF, 0x00},
161 {VIACR, CR97, 0xFF, 0x00},
162 {VIACR, CR99, 0xFF, 0x00},
163 {VIACR, CR9B, 0xFF, 0x00}
175 {VIASR, SR2A, 0xF0, 0x00},
176 {VIASR, SR58, 0xFF, 0x00},
177 {VIASR, SR59, 0xFF, 0x00},
179 {VIACR, CR32, 0xFF, 0x00},
180 {VIACR, CR33, 0x7F, 0x00},
181 {VIACR, CR35, 0xFF, 0x00},
182 {VIACR, CR36, 0x08, 0x00},
183 {VIACR, CR69, 0xFF, 0x00},
185 {VIACR, CR6B, 0xFF, 0x00},
187 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
191 {VIACR, CR96, 0xFF, 0x00},
192 {VIACR, CR97, 0xFF, 0x00},
193 {VIACR, CR99, 0xFF, 0x00},
194 {VIACR, CR9B, 0xFF, 0x00},
200 struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00},
201 {VIASR, SR2A, 0x0F, 0x00},
208 {VIACR, CR32, 0xFF, 0x00},
209 {VIACR, CR35, 0xFF, 0x00},
210 {VIACR, CR36, 0x08, 0x00},
214 {VIACR, CR55, 0x80, 0x00},
215 {VIACR, CR5D, 0x80, 0x00},
217 {VIAGR, GR20, 0xFF, 0x00},
218 {VIAGR, GR21, 0xFF, 0x00},
219 {VIAGR, GR22, 0xFF, 0x00},
244 {0x01, 0x0F, 0x00, 0x0E},
246 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0F, 0xFF},
248 {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
250 0x01, 0x00, 0x0F, 0x00}