Lines Matching defs:tmp
308 int tmp = bpp == 24 ? 2 : (bpp >> 4);
309 int v2 = v1 | (tmp << 29);
479 int tmp = bpp == 24 ? 2: (bpp >> 4);
482 writemmr(par, 0x2120, 0x40000000 | tmp);
764 int x, y, tmp;
769 tmp = (read3CE(par, VertStretch) >> 4) & 3;
771 switch (tmp) {
826 u8 tmp;
829 tmp = read3X4(par, CRTCModuleTest) & 0xDF;
830 write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11));
831 tmp = read3X4(par, CRTHiOrd) & 0xF8;
832 write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17));
883 int tmp = read3CE(par, CyberEnhance) & 0x8F;
885 tmp |= 0x50;
887 tmp |= 0x30;
889 tmp |= 0x20;
891 tmp |= 0x10;
892 write3CE(par, CyberEnhance, tmp);
911 unsigned char tmp, tmp2;
923 tmp = read3X4(par, SPR) & 0x0F;
924 switch (tmp) {
1140 unsigned char tmp;
1171 tmp = 0xEB;
1173 tmp &= ~0x40;
1175 tmp &= ~0x80;
1183 t_outb(par, tmp | 0xC0, VGA_MIS_W);
1193 t_outb(par, tmp, VGA_MIS_W);
1215 tmp = 0x10;
1216 if (vtotal & 0x100) tmp |= 0x01;
1217 if (vdispend & 0x100) tmp |= 0x02;
1218 if (vsyncstart & 0x100) tmp |= 0x04;
1219 if (vblankstart & 0x100) tmp |= 0x08;
1221 if (vtotal & 0x200) tmp |= 0x20;
1222 if (vdispend & 0x200) tmp |= 0x40;
1223 if (vsyncstart & 0x200) tmp |= 0x80;
1224 write3X4(par, VGA_CRTC_OVERFLOW, tmp);
1226 tmp = read3X4(par, CRTHiOrd) & 0x07;
1227 tmp |= 0x08; /* line compare bit 10 */
1228 if (vtotal & 0x400) tmp |= 0x80;
1229 if (vblankstart & 0x400) tmp |= 0x40;
1230 if (vsyncstart & 0x400) tmp |= 0x20;
1231 if (vdispend & 0x400) tmp |= 0x10;
1232 write3X4(par, CRTHiOrd, tmp);
1234 tmp = (htotal >> 8) & 0x01;
1235 tmp |= (hdispend >> 7) & 0x02;
1236 tmp |= (hsyncstart >> 5) & 0x08;
1237 tmp |= (hblankstart >> 4) & 0x10;
1238 write3X4(par, HorizOverflow, tmp);
1240 tmp = 0x40;
1241 if (vblankstart & 0x200) tmp |= 0x20;
1242 //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */
1243 write3X4(par, VGA_CRTC_MAX_SCAN, tmp);
1251 tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80;
1253 write3X4(par, CRTCModuleTest, tmp);
1254 tmp = read3CE(par, MiscIntContReg) & ~0x4;
1256 tmp |= 0x4;
1257 write3CE(par, MiscIntContReg, tmp);
1264 tmp = 0x00;
1267 tmp = 0x05;
1270 tmp = 0x29;
1273 tmp = 0x09;
1277 write3X4(par, PixelBusReg, tmp);
1279 tmp = read3X4(par, DRAMControl);
1281 tmp |= 0x10;
1283 tmp |= 0x20;
1284 write3X4(par, DRAMControl, tmp); /* both IO, linear enable */
1304 tmp = read3CE(par, MiscExtFunc) & 0xF0;
1306 tmp |= 8;
1310 write3CE(par, MiscExtFunc, tmp | 0x12);
1321 for (tmp = 0; tmp < 0x10; tmp++)
1322 writeAttr(par, tmp, tmp);
1328 tmp = 0;
1331 tmp = 0x30;
1335 tmp = 0xD0;
1344 t_outb(par, tmp, VGA_PEL_MSK);