Lines Matching refs:retval
1624 int retval = -ENOMEM;
1674 retval = fb_alloc_cmap(&info->cmap, 256, 0);
1675 if (retval < 0) {
1676 dev_err(dev->gdev, "fb_alloc_cmap failed %x\n", retval);
1680 retval = ufx_reg_read(dev, 0x3000, &id_rev);
1681 check_warn_goto_error(retval, "error %d reading 0x3000 register from device", retval);
1684 retval = ufx_reg_read(dev, 0x3004, &fpga_rev);
1685 check_warn_goto_error(retval, "error %d reading 0x3004 register from device", retval);
1689 retval = ufx_lite_reset(dev);
1690 check_warn_goto_error(retval, "error %d resetting device", retval);
1693 retval = ufx_config_sys_clk(dev);
1694 check_warn_goto_error(retval, "error %d configuring system clock", retval);
1697 retval = ufx_config_ddr2(dev);
1698 check_warn_goto_error(retval, "error %d initialising DDR2 controller", retval);
1701 retval = ufx_i2c_init(dev);
1702 check_warn_goto_error(retval, "error %d initialising I2C controller", retval);
1705 retval = ufx_setup_modes(dev, info, NULL, 0);
1706 check_warn_goto_error(retval, "unable to find common mode for display and adapter");
1708 retval = ufx_reg_set_bits(dev, 0x4000, 0x00000001);
1709 if (retval < 0) {
1710 dev_err(dev->gdev, "error %d enabling graphics engine", retval);
1718 retval = ufx_ops_check_var(&info->var, info);
1719 if (retval < 0) {
1720 dev_err(dev->gdev, "error %d ufx_ops_check_var", retval);
1725 retval = ufx_ops_set_par(info);
1726 if (retval < 0) {
1727 dev_err(dev->gdev, "error %d ufx_ops_set_par", retval);
1732 retval = register_framebuffer(info);
1733 if (retval < 0) {
1734 dev_err(dev->gdev, "error %d register_framebuffer", retval);
1760 return retval;