Lines Matching defs:lcdc
291 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]);
293 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
300 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] +
307 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]);
313 iowrite32(data, ovl->channel->lcdc->base + reg);
314 iowrite32(data, ovl->channel->lcdc->base + reg + SIDE_B_OFFSET);
403 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT);
404 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
405 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
407 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
414 lcdc_write(ch->lcdc, _LDDWD0R, data | LDDWDxR_WDACT | LDDWDxR_RSW);
415 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
416 lcdc_write(ch->lcdc, _LDDWAR, LDDWAR_WA |
418 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
425 lcdc_write(ch->lcdc, _LDDRDR, LDDRDR_RSR);
426 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
427 lcdc_write(ch->lcdc, _LDDRAR, LDDRAR_RA |
430 lcdc_wait_bit(ch->lcdc, _LDSR, LDSR_AS, 0);
432 return lcdc_read(ch->lcdc, _LDDRDR) & LDDRDR_DRD_MASK;
464 sh_mobile_lcdc_clk_on(ch->lcdc);
485 dma_map_sg(ch->lcdc->dev, ch->sglist, nr_pages, DMA_TO_DEVICE);
489 dma_unmap_sg(ch->lcdc->dev, ch->sglist, nr_pages,
687 ldintr = lcdc_read(ch->lcdc, _LDINTR);
689 lcdc_write(ch->lcdc, _LDINTR, ldintr);
705 /* start or stop the lcdc */
785 lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index));
787 lcdc_write(ovl->channel->lcdc, LDBCR,
850 lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index));
866 lcdc_write(ovl->channel->lcdc, LDBCR,
1099 /* stop the lcdc */
1407 lcdc_write(ovl->channel->lcdc, LDBCR, LDBCR_UPC(ovl->index));
1412 lcdc_write(ovl->channel->lcdc, LDBCR,
1489 return dma_mmap_coherent(ovl->channel->lcdc->dev, vma, ovl->fb_mem,
1522 struct sh_mobile_lcdc_priv *lcdc = ovl->channel->lcdc;
1534 dev_info(lcdc->dev, "registered %s/overlay %u as %dx%d %dbpp.\n",
1535 dev_name(lcdc->dev), ovl->index, info->var.xres,
1561 struct sh_mobile_lcdc_priv *priv = ovl->channel->lcdc;
1687 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
1727 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS);
1729 lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_MRS);
1826 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1883 sh_mobile_lcdc_stop(ch->lcdc);
1898 ret = sh_mobile_lcdc_start(ch->lcdc);
1926 struct sh_mobile_lcdc_priv *p = ch->lcdc;
1963 return dma_mmap_coherent(ch->lcdc->dev, vma, ch->fb_mem,
2011 dev_info(ch->lcdc->dev, "registered %s/%s as %dx%d %dbpp.\n",
2012 dev_name(ch->lcdc->dev), (ch->cfg->chan == LCDC_CHAN_MAINLCD) ?
2018 sh_mobile_lcdc_clk_off(ch->lcdc);
2042 struct sh_mobile_lcdc_priv *priv = ch->lcdc;
2279 ch->tx_dev->lcdc = NULL;
2356 struct device *dev = ovl->channel->lcdc->dev;
2412 struct device *dev = ch->lcdc->dev;
2501 ch->tx_dev->lcdc = ch;
2552 ch->lcdc = priv;