Lines Matching refs:mclks
660 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
686 mclks = 5;
687 mclks += 3;
688 mclks += 1;
689 mclks += cas;
690 mclks += 1;
691 mclks += 1;
692 mclks += 1;
693 mclks += 1;
700 mclks+=4;
709 mclk_loop = mclks+mclk_extra;
846 int nvclks, mclks, pclks, vpagemiss, crtpagemiss, vbs;
881 mclks = 1; /* 2 edge sync. may be very close to edge so just put one. */
883 mclks += 1; /* arb_hp_req */
884 mclks += 5; /* ap_hp_req tiling pipeline */
886 mclks += 2; /* tc_req latency fifo */
887 mclks += 2; /* fb_cas_n_ memory request to fbio block */
888 mclks += 7; /* sm_d_rdv data returned from fbio block */
893 mclks += 4;
895 mclks += 2;
898 mclks += 2;
900 mclks += 1;
920 mclks+=4; /* Mp can get in with a burst of 8. */
929 mclk_loop = mclks+mclk_extra;
931 us_m_min = mclks * 1000*1000 / mclk_freq; /* Minimum Mclk latency in us */