Lines Matching defs:sossi
20 #define MODULE_NAME "omapfb-sossi"
68 } sossi;
72 return readl(sossi.base + reg);
77 return readw(sossi.base + reg);
82 return readb(sossi.base + reg);
87 writel(value, sossi.base + reg);
92 writew(value, sossi.base + reg);
97 writeb(value, sossi.base + reg);
114 u32 clk_period = HZ_TO_PS(sossi.fck_hz) * div;
129 /* reon will be exactly one sossi tick */
157 * access time (data hold time) will be exactly one sossi
180 /* weon will be exactly one sossi tick */
213 dev_dbg(sossi.fbdev->dev, "Using TW0 = %d, TW1 = %d, div = %d\n",
217 clk_set_rate(sossi.fck, sossi.fck_hz / div);
218 clk_enable(sossi.fck);
223 clk_disable(sossi.fck);
254 if (access != sossi.last_access) {
255 sossi.last_access = access;
256 _set_timing(sossi.clk_div,
257 sossi.clk_tw0[access], sossi.clk_tw1[access]);
304 unsigned long nr_cycles = len / (sossi.bus_pick_width / 8);
340 sossi.clk_tw0[RD_ACCESS] = t->tim[0];
341 sossi.clk_tw1[RD_ACCESS] = t->tim[1];
343 sossi.clk_tw0[WR_ACCESS] = t->tim[2];
344 sossi.clk_tw1[WR_ACCESS] = t->tim[3];
346 sossi.clk_div = t->tim[4];
351 *clk_period = HZ_TO_PS(sossi.fck_hz);
377 sossi.bus_pick_width = bus_pick_width;
378 sossi.bus_pick_count = bus_pick_count;
402 dev_dbg(sossi.fbdev->dev,
406 clk_enable(sossi.fck);
420 clk_disable(sossi.fck);
429 dev_dbg(sossi.fbdev->dev, "tearsync %d line %d\n", enable, line);
439 sossi.tearsync_line = line;
440 sossi.tearsync_mode = mode;
447 clk_enable(sossi.fck);
449 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
457 clk_disable(sossi.fck);
462 clk_enable(sossi.fck);
464 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
472 clk_disable(sossi.fck);
480 sossi.lcdc_callback = callback;
481 sossi.lcdc_callback_data = data;
483 clk_enable(sossi.fck);
485 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
486 _set_tearsync_mode(sossi.tearsync_mode, sossi.tearsync_line);
489 set_cycles(width * height * sossi.bus_pick_width / 8);
492 if (sossi.tearsync_mode) {
501 spin_lock_irqsave(&sossi.lock, flags);
502 sossi.vsync_dma_pending++;
503 spin_unlock_irqrestore(&sossi.lock, flags);
513 clk_disable(sossi.fck);
514 sossi.lcdc_callback(sossi.lcdc_callback_data);
519 clk_enable(sossi.fck);
521 _set_bits_per_cycle(sossi.bus_pick_count, sossi.bus_pick_width);
542 clk_disable(sossi.fck);
549 spin_lock_irqsave(&sossi.lock, flags);
550 if (sossi.vsync_dma_pending) {
551 sossi.vsync_dma_pending--;
554 spin_unlock_irqrestore(&sossi.lock, flags);
565 sossi.base = ioremap(OMAP_SOSSI_BASE, SZ_1K);
566 if (!sossi.base) {
571 sossi.fbdev = fbdev;
572 spin_lock_init(&sossi.lock);
584 sossi.fck_hz = clk_get_rate(dpll1out_ck);
592 sossi.fck = fck;
601 clk_enable(sossi.fck);
643 "sossi_match", sossi.fbdev->dev)) < 0) {
644 dev_err(sossi.fbdev->dev, "can't get SoSSI match IRQ\n");
648 clk_disable(sossi.fck);
652 clk_disable(sossi.fck);
653 clk_put(sossi.fck);
660 clk_put(sossi.fck);
661 iounmap(sossi.base);