Lines Matching defs:hwa742
123 } hwa742;
131 hwa742.extif->set_bits_per_cycle(8);
132 hwa742.extif->write_command(®, 1);
133 hwa742.extif->read_data(&data, 1);
140 hwa742.extif->set_bits_per_cycle(8);
141 hwa742.extif->write_command(®, 1);
142 hwa742.extif->write_data(&data, 1);
161 hwa742.extif->set_bits_per_cycle(8);
164 hwa742.extif->write_command(&cmd, 1);
166 hwa742.extif->write_data(tmp, 8);
172 hwa742.window_type = ((hwa742.window_type & 0xfc) | 0x01);
174 dev_dbg(hwa742.fbdev->dev, "hwa742: enabled pixel doubling\n");
177 hwa742.window_type = (hwa742.window_type & 0xfc);
179 dev_dbg(hwa742.fbdev->dev, "hwa742: disabled pixel doubling\n");
185 hwa742_write_reg(HWA742_WINDOW_TYPE, hwa742.window_type);
197 if (likely(hwa742.vsync_only || force_vsync)) {
198 hwa742.extif->enable_tearsync(1, 0);
202 if (width * hwa742.pix_tx_time < hwa742.line_upd_time) {
203 hwa742.extif->enable_tearsync(1, 0);
207 if ((width * hwa742.pix_tx_time / 1000) * height <
208 (y + height) * (hwa742.line_upd_time / 1000)) {
209 hwa742.extif->enable_tearsync(1, 0);
213 hwa742.extif->enable_tearsync(1, y + 1);
220 hwa742.extif->enable_tearsync(0, 0);
234 down(&hwa742.req_sema);
238 spin_lock_irqsave(&hwa742.req_lock, flags);
239 BUG_ON(list_empty(&hwa742.free_req_list));
240 req = list_entry(hwa742.free_req_list.next,
243 spin_unlock_irqrestore(&hwa742.req_lock, flags);
255 spin_lock_irqsave(&hwa742.req_lock, flags);
257 list_move(&req->entry, &hwa742.free_req_list);
259 up(&hwa742.req_sema);
261 spin_unlock_irqrestore(&hwa742.req_lock, flags);
268 spin_lock_irqsave(&hwa742.req_lock, flags);
270 while (!list_empty(&hwa742.pending_req_list)) {
275 req = list_entry(hwa742.pending_req_list.next,
277 spin_unlock_irqrestore(&hwa742.req_lock, flags);
289 spin_lock_irqsave(&hwa742.req_lock, flags);
292 spin_unlock_irqrestore(&hwa742.req_lock, flags);
300 spin_lock_irqsave(&hwa742.req_lock, flags);
301 if (likely(!list_empty(&hwa742.pending_req_list)))
303 list_splice_init(head, hwa742.pending_req_list.prev);
304 spin_unlock_irqrestore(&hwa742.req_lock, flags);
339 int scr_width = hwa742.fbdev->panel->x_res;
340 int scr_height = hwa742.fbdev->panel->y_res;
343 dev_dbg(hwa742.fbdev->dev, "x %d y %d w %d h %d scr_width %d "
368 if (hwa742.prev_flags != flags ||
369 hwa742.prev_color_mode != color_mode) {
371 hwa742.prev_color_mode = color_mode;
372 hwa742.prev_flags = flags;
385 hwa742.int_ctrl->setup_plane(OMAPFB_PLANE_GFX,
389 hwa742.extif->set_bits_per_cycle(16);
391 hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 1);
392 hwa742.extif->transfer_area(w, h, request_complete, req);
399 hwa742.int_ctrl->enable_plane(OMAPFB_PLANE_GFX, 0);
440 if (xspan * height * 2 > hwa742.max_transmit_size) {
441 yspan = hwa742.max_transmit_size / (xspan * 2);
459 if (!hwa742.stop_auto_update)
460 mod_timer(&hwa742.auto_update_timer,
469 create_req_list(&hwa742.auto_update_window, &req_list);
487 if (hwa742.update_mode != OMAPFB_MANUAL_UPDATE) {
488 dev_dbg(hwa742.fbdev->dev, "invalid update mode\n");
495 dev_dbg(hwa742.fbdev->dev, "invalid window flag\n");
530 hwa742.int_ctrl->enable_plane(plane, enable);
562 dev_dbg(hwa742.fbdev->dev, "update_mode %d\n", hwa742.update_mode);
563 if (hwa742.update_mode == OMAPFB_MANUAL_UPDATE) {
564 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
574 if (mode == hwa742.update_mode)
577 dev_info(hwa742.fbdev->dev, "HWA742: setting update mode to %s\n",
581 switch (hwa742.update_mode) {
583 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_DISABLED);
586 hwa742.stop_auto_update = 1;
587 del_timer_sync(&hwa742.auto_update_timer);
593 hwa742.update_mode = mode;
595 hwa742.stop_auto_update = 0;
599 omapfb_notify_clients(hwa742.fbdev, OMAPFB_EVENT_READY);
613 return hwa742.update_mode;
618 int bus_tick = hwa742.extif_clk_period * div;
636 dev_dbg(hwa742.fbdev->dev, "HWA742 systim %lu ps extif_clk_period %u ps"
637 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
639 t = &hwa742.reg_timings;
657 dev_dbg(hwa742.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
659 dev_dbg(hwa742.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
662 dev_dbg(hwa742.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
665 return hwa742.extif->convert_timings(t);
683 dev_dbg(hwa742.fbdev->dev, "HWA742 systim %lu ps extif_clk_period %u ps"
684 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div);
686 t = &hwa742.lut_timings;
708 dev_dbg(hwa742.fbdev->dev, "[lut]cson %d csoff %d reon %d reoff %d\n",
710 dev_dbg(hwa742.fbdev->dev, "[lut]weon %d weoff %d recyc %d wecyc %d\n",
713 dev_dbg(hwa742.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
716 return hwa742.extif->convert_timings(t);
724 hwa742.extif->get_clk_info(&hwa742.extif_clk_period, &max_clk_div);
745 dev_err(hwa742.fbdev->dev, "can't setup timings\n");
767 dev_dbg(hwa742.fbdev->dev,
770 dev_dbg(hwa742.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
800 hwa742.pix_tx_time = hwa742.reg_timings.we_cycle_time;
801 if (hwa742.extif->get_max_tx_rate != NULL) {
807 unsigned long max_tx_rate = hwa742.extif->get_max_tx_rate();
809 dev_dbg(hwa742.fbdev->dev, "max_tx_rate %ld HZ\n",
812 if (hwa742.pix_tx_time < min_tx_time)
813 hwa742.pix_tx_time = min_tx_time;
817 hwa742.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
818 hwa742.line_upd_time *= 1000;
819 if (hdisp * hwa742.pix_tx_time > hwa742.line_upd_time)
872 hwa742.vsync_only = !use_hsvs;
874 dev_dbg(hwa742.fbdev->dev,
876 pix_clk, hwa742.pix_tx_time, hwa742.line_upd_time);
877 dev_dbg(hwa742.fbdev->dev,
881 return hwa742.extif->setup_tearsync(1, hs, vs,
887 hwa742.int_ctrl->get_caps(plane, caps);
890 if (hwa742.te_connected)
898 hwa742.update_mode_before_suspend = hwa742.update_mode;
902 clk_disable(hwa742.sys_ck);
907 clk_enable(hwa742.sys_ck);
918 hwa742_set_update_mode(hwa742.update_mode_before_suspend);
933 hwa742.fbdev = fbdev;
934 hwa742.extif = fbdev->ext_if;
935 hwa742.int_ctrl = fbdev->int_ctrl;
939 hwa742.sys_ck = clk_get(NULL, "hwa_sys_ck");
941 spin_lock_init(&hwa742.req_lock);
943 if ((r = hwa742.int_ctrl->init(fbdev, 1, req_vram)) < 0)
946 if ((r = hwa742.extif->init(fbdev)) < 0)
949 ext_clk = clk_get_rate(hwa742.sys_ck);
952 hwa742.extif->set_timings(&hwa742.reg_timings);
953 clk_enable(hwa742.sys_ck);
958 hwa742.extif->set_timings(&hwa742.reg_timings);
976 dev_err(hwa742.fbdev->dev,
980 hwa742.te_connected = 1;
982 hwa742.max_transmit_size = hwa742.extif->max_transmit_size;
984 hwa742.update_mode = OMAPFB_UPDATE_DISABLED;
986 hwa742.auto_update_window.x = 0;
987 hwa742.auto_update_window.y = 0;
988 hwa742.auto_update_window.width = fbdev->panel->x_res;
989 hwa742.auto_update_window.height = fbdev->panel->y_res;
990 hwa742.auto_update_window.format = 0;
992 timer_setup(&hwa742.auto_update_timer, hwa742_update_window_auto, 0);
994 hwa742.prev_color_mode = -1;
995 hwa742.prev_flags = 0;
997 hwa742.fbdev = fbdev;
999 INIT_LIST_HEAD(&hwa742.free_req_list);
1000 INIT_LIST_HEAD(&hwa742.pending_req_list);
1001 for (i = 0; i < ARRAY_SIZE(hwa742.req_pool); i++)
1002 list_add(&hwa742.req_pool[i].entry, &hwa742.free_req_list);
1004 sema_init(&hwa742.req_sema, i - IRQ_REQ_POOL_SIZE);
1012 clk_disable(hwa742.sys_ck);
1014 hwa742.extif->cleanup();
1016 hwa742.int_ctrl->cleanup();
1024 hwa742.extif->cleanup();
1025 hwa742.int_ctrl->cleanup();
1026 clk_disable(hwa742.sys_ck);
1030 .name = "hwa742",