Lines Matching defs:lcd
11 #include <linux/lcd.h>
37 static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val)
51 lcd->buffer[0] = LTV_OPC_INDEX;
52 lcd->buffer[1] = 0x00;
53 lcd->buffer[2] = reg & 0x7f;
54 index_xfer.tx_buf = lcd->buffer;
58 lcd->buffer[4] = LTV_OPC_DATA;
59 lcd->buffer[5] = val >> 8;
60 lcd->buffer[6] = val;
61 value_xfer.tx_buf = lcd->buffer + 4;
64 return spi_sync(lcd->spi, &msg);
68 static int ltv350qv_power_on(struct ltv350qv *lcd)
73 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000))
78 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE))
80 if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE))
84 if (ltv350qv_write_reg(lcd, LTV_PWRCTL1,
92 ret = ltv350qv_write_reg(lcd, LTV_IFCTL,
94 ret |= ltv350qv_write_reg(lcd, LTV_DATACTL,
97 ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE,
103 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3));
104 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
106 ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a);
107 ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021);
108 ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0));
109 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103);
110 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301);
111 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f);
112 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f);
113 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707);
114 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307);
115 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707);
116 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000);
117 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004);
118 ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000);
126 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
130 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
144 ltv350qv_write_reg(lcd, LTV_PWRCTL1,
147 ltv350qv_write_reg(lcd, LTV_GATECTL2,
152 ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
155 ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
159 static int ltv350qv_power_off(struct ltv350qv *lcd)
164 ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1,
168 ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2,
172 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000);
178 ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE);
192 static int ltv350qv_power(struct ltv350qv *lcd, int power)
196 if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
197 ret = ltv350qv_power_on(lcd);
198 else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
199 ret = ltv350qv_power_off(lcd);
202 lcd->power = power;
209 struct ltv350qv *lcd = lcd_get_data(ld);
211 return ltv350qv_power(lcd, power);
216 struct ltv350qv *lcd = lcd_get_data(ld);
218 return lcd->power;
228 struct ltv350qv *lcd;
232 lcd = devm_kzalloc(&spi->dev, sizeof(struct ltv350qv), GFP_KERNEL);
233 if (!lcd)
236 lcd->spi = spi;
237 lcd->power = FB_BLANK_POWERDOWN;
238 lcd->buffer = devm_kzalloc(&spi->dev, 8, GFP_KERNEL);
239 if (!lcd->buffer)
242 ld = devm_lcd_device_register(&spi->dev, "ltv350qv", &spi->dev, lcd,
247 lcd->ld = ld;
249 ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK);
253 spi_set_drvdata(spi, lcd);
260 struct ltv350qv *lcd = spi_get_drvdata(spi);
262 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
269 struct ltv350qv *lcd = dev_get_drvdata(dev);
271 return ltv350qv_power(lcd, FB_BLANK_POWERDOWN);
276 struct ltv350qv *lcd = dev_get_drvdata(dev);
278 return ltv350qv_power(lcd, FB_BLANK_UNBLANK);
287 struct ltv350qv *lcd = spi_get_drvdata(spi);
289 ltv350qv_power(lcd, FB_BLANK_POWERDOWN);