Lines Matching defs:byte
761 * Write through to emulation. If the write includes the upper byte
1169 * The upper byte of the control register is reserved,
1170 * just setup the lower byte.
1271 u8 byte;
1294 ret = pci_read_config_byte(pdev, pos + PCI_CAP_FLAGS, &byte);
1298 return byte;
1317 ret = pci_read_config_byte(pdev, pos + 3, &byte);
1321 return (byte & HT_3BIT_CAP_MASK) ?
1324 ret = pci_read_config_byte(pdev, pos + PCI_SATA_REGS, &byte);
1328 byte &= PCI_SATA_REGS_MASK;
1329 if (byte == PCI_SATA_REGS_INLINE)
1344 u8 byte;
1360 ret = pci_read_config_byte(pdev, epos + PCI_ACS_CAP, &byte);
1364 if (byte & PCI_ACS_EC) {
1369 &byte);
1373 bits = byte ? round_up(byte, 32) : 256;
1379 ret = pci_read_config_byte(pdev, epos + PCI_REBAR_CTRL, &byte);
1383 byte &= PCI_REBAR_CTRL_NBAR_MASK;
1384 byte >>= PCI_REBAR_CTRL_NBAR_SHIFT;
1386 return 4 + (byte * 8);
1388 ret = pci_read_config_byte(pdev, epos + PCI_DPA_CAP, &byte);
1392 byte &= PCI_DPA_CAP_SUBSTATE_MASK;
1393 return PCI_DPA_BASE_SIZEOF + byte + 1;
1448 u8 *byte = &vdev->vconfig[offset];
1449 ret = pci_read_config_byte(pdev, offset, byte);
1618 * from exceeding 1 byte capabilities. If we ever make it
1619 * up to 0xFE we'll need to up this to a two-byte, byte map.
1680 * use one byte per dword to record the type. However, there are
1682 * capabilities needs byte granularity.