Lines Matching refs:Data
519 __u16 Data;
555 Data = 0x0;
556 status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
561 Data |= 0x80;
562 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
568 Data &= ~0x80;
569 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
576 Data = 0x0;
578 &Data);
583 Data |= 0x08; /* Driver done bit */
584 Data |= 0x20; /* rx_disable */
586 mos7840_port->ControlRegOffset, Data);
596 Data = 0x00;
597 status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
603 Data = 0x00;
604 status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
610 Data = 0xcf;
611 status = mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
617 Data = 0x03;
618 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
619 mos7840_port->shadowLCR = Data;
621 Data = 0x0b;
622 status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
623 mos7840_port->shadowMCR = Data;
625 Data = 0x00;
626 status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
627 mos7840_port->shadowLCR = Data;
629 Data |= SERIAL_LCR_DLAB; /* data latch enable in LCR 0x80 */
630 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
632 Data = 0x0c;
633 status = mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
635 Data = 0x0;
636 status = mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
638 Data = 0x00;
639 status = mos7840_get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
641 Data = Data & ~SERIAL_LCR_DLAB;
642 status = mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
643 mos7840_port->shadowLCR = Data;
646 Data = 0x0;
647 status = mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, &Data);
649 Data = Data | 0x0c;
650 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
652 Data = Data & ~0x0c;
653 status = mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, Data);
655 Data = 0x0c;
656 status = mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
659 Data = 0x0;
661 &Data);
662 Data = Data & ~0x20;
664 Data);
667 Data = 0x0;
669 &Data);
670 Data = Data | 0x10;
672 Data);
766 __u16 Data;
782 Data = 0x0;
783 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
785 Data = 0x00;
786 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
859 /* __u16 Data; */
1108 __u16 Data;
1117 Data = 0x2b;
1118 mos7840_port->shadowMCR = Data;
1120 Data);
1130 Data = 0xb;
1131 mos7840_port->shadowMCR = Data;
1133 Data);
1144 Data = 0x0;
1148 &Data);
1153 Data = (Data & 0x8f) | clk_sel_val;
1155 Data);
1167 Data = mos7840_port->shadowLCR | SERIAL_LCR_DLAB;
1168 mos7840_port->shadowLCR = Data;
1169 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1172 Data = (unsigned char)(divisor & 0xff);
1173 dev_dbg(&port->dev, "set_serial_baud Value to write DLL is %x\n", Data);
1174 mos7840_set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
1176 Data = (unsigned char)((divisor & 0xff00) >> 8);
1177 dev_dbg(&port->dev, "set_serial_baud Value to write DLM is %x\n", Data);
1178 mos7840_set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
1181 Data = mos7840_port->shadowLCR & ~SERIAL_LCR_DLAB;
1182 mos7840_port->shadowLCR = Data;
1183 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1205 __u16 Data;
1267 Data = 0x00;
1268 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1270 Data = 0x00;
1271 mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
1273 Data = 0xcf;
1274 mos7840_set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
1277 Data = mos7840_port->shadowLCR;
1279 mos7840_set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1281 Data = 0x00b;
1282 mos7840_port->shadowMCR = Data;
1283 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1284 Data = 0x00b;
1285 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1298 Data = mos7840_port->shadowMCR;
1299 mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1314 Data = 0x0c;
1315 mos7840_set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1565 __u16 Data;
1611 mos7840_port->ControlRegOffset, &Data);
1616 dev_dbg(&port->dev, "ControlReg Reading success val is %x, status%d\n", Data, status);
1617 Data |= 0x08; /* setting driver done bit */
1618 Data |= 0x04; /* sp1_bit to have cts change reflect in
1621 /* Data |= 0x20; //rx_disable bit */
1623 mos7840_port->ControlRegOffset, Data);
1632 Data = 0x01;
1634 (__u16) (mos7840_port->DcrRegOffset + 0), Data);
1641 Data = 0x05;
1643 (__u16) (mos7840_port->DcrRegOffset + 1), Data);
1650 Data = 0x24;
1652 (__u16) (mos7840_port->DcrRegOffset + 2), Data);
1660 Data = 0x0;
1661 status = mos7840_set_reg_sync(port, CLK_START_VALUE_REGISTER, Data);
1668 Data = 0x20;
1669 status = mos7840_set_reg_sync(port, CLK_MULTI_REGISTER, Data);
1677 Data = 0x00;
1678 status = mos7840_set_uart_reg(port, SCRATCH_PAD_REGISTER, Data);
1687 Data = 0xff;
1690 ((__u16)mos7840_port->port_num)), Data);
1699 Data = 0xff;
1702 ((__u16)mos7840_port->port_num) - 0x1), Data);