Lines Matching refs:musb
20 /* ep0 is always musb->endpoints[0].ep_in */
21 #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0])
51 struct musb *musb,
54 void __iomem *mbase = musb->mregs;
63 result[0] = musb->g.is_selfpowered << USB_DEVICE_SELF_POWERED;
64 result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
65 if (musb->g.is_otg) {
66 result[0] |= musb->g.b_hnp_enable
68 result[0] |= musb->g.a_alt_hnp_support
70 result[0] |= musb->g.a_hnp_support
99 ep = &musb->endpoints[epnum].ep_in;
101 ep = &musb->endpoints[epnum].ep_out;
102 regs = musb->endpoints[epnum].regs;
133 musb_write_fifo(&musb->endpoints[0], len, result);
151 service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
159 handled = service_tx_status_request(musb,
175 static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)
177 musb_g_giveback(&musb->endpoints[0].ep_in, req, 0);
183 static inline void musb_try_b_hnp_enable(struct musb *musb)
185 void __iomem *mbase = musb->mregs;
188 musb_dbg(musb, "HNP: Setting HR");
204 service_zero_data_request(struct musb *musb,
206 __releases(musb->lock)
207 __acquires(musb->lock)
210 void __iomem *mbase = musb->mregs;
219 musb->set_address = true;
220 musb->address = (u8) (ctrlrequest->wValue & 0x7f);
230 musb->may_wakeup = 0;
249 ep = musb->endpoints + epnum;
285 musb_dbg(musb, "restarting the request");
286 musb_ep_restart(musb, request);
305 musb->may_wakeup = 1;
308 if (musb->g.speed != USB_SPEED_HIGH)
316 musb->test_mode_nr =
321 musb->test_mode_nr =
326 musb->test_mode_nr =
331 musb->test_mode_nr =
338 musb->test_mode_nr =
344 musb->test_mode_nr =
350 musb->test_mode_nr =
356 musb->test_mode_nr =
365 musb->test_mode = true;
368 if (!musb->g.is_otg)
370 musb->g.b_hnp_enable = 1;
371 musb_try_b_hnp_enable(musb);
374 if (!musb->g.is_otg)
376 musb->g.a_hnp_support = 1;
379 if (!musb->g.is_otg)
381 musb->g.a_alt_hnp_support = 1;
409 ep = musb->endpoints + epnum;
460 static void ep0_rxstate(struct musb *musb)
462 void __iomem *regs = musb->control_ep->regs;
467 request = next_ep0_request(musb);
484 musb_read_fifo(&musb->endpoints[0], count, buf);
489 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
501 musb->ackpend = csr;
502 musb_g_ep0_giveback(musb, req);
503 if (!musb->ackpend)
505 musb->ackpend = 0;
507 musb_ep_select(musb->mregs, 0);
517 static void ep0_txstate(struct musb *musb)
519 void __iomem *regs = musb->control_ep->regs;
520 struct musb_request *req = next_ep0_request(musb);
528 musb_dbg(musb, "odd; csr0 %04x", musb_readw(regs, MUSB_CSR0));
538 musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src);
545 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
556 musb->ackpend = csr;
557 musb_g_ep0_giveback(musb, request);
558 if (!musb->ackpend)
560 musb->ackpend = 0;
564 musb_ep_select(musb->mregs, 0);
575 musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)
578 void __iomem *regs = musb->control_ep->regs;
580 musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req);
585 musb_dbg(musb, "SETUP req%02x.%02x v%04x i%04x l%d",
593 r = next_ep0_request(musb);
595 musb_g_ep0_giveback(musb, &r->request);
605 musb->set_address = false;
606 musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY;
609 musb->ackpend |= MUSB_CSR0_TXPKTRDY;
610 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT;
612 musb->ep0_state = MUSB_EP0_STAGE_TX;
617 musb->ackpend = 0;
619 musb->ep0_state = MUSB_EP0_STAGE_RX;
623 forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
624 __releases(musb->lock)
625 __acquires(musb->lock)
628 if (!musb->gadget_driver)
630 spin_unlock(&musb->lock);
631 retval = musb->gadget_driver->setup(&musb->g, ctrlrequest);
632 spin_lock(&musb->lock);
641 irqreturn_t musb_g_ep0_irq(struct musb *musb)
645 void __iomem *mbase = musb->mregs;
646 void __iomem *regs = musb->endpoints[0].regs;
653 musb_dbg(musb, "csr %04x, count %d, ep0stage %s",
654 csr, len, decode_ep0stage(musb->ep0_state));
669 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
678 switch (musb->ep0_state) {
680 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
683 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
687 decode_ep0stage(musb->ep0_state));
697 switch (musb->ep0_state) {
702 ep0_txstate(musb);
710 ep0_rxstate(musb);
723 if (musb->set_address) {
724 musb->set_address = false;
725 musb_writeb(mbase, MUSB_FADDR, musb->address);
729 else if (musb->test_mode) {
730 musb_dbg(musb, "entering TESTMODE");
732 if (MUSB_TEST_PACKET == musb->test_mode_nr)
733 musb_load_testpacket(musb);
736 musb->test_mode_nr);
745 req = next_ep0_request(musb);
747 musb_g_ep0_giveback(musb, &req->request);
758 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
769 musb->ep0_state = MUSB_EP0_STAGE_SETUP;
782 musb_read_setup(musb, &setup);
786 if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) {
793 musb->g.speed = (power & MUSB_POWER_HSMODE)
798 switch (musb->ep0_state) {
807 musb, &setup);
815 musb->ackpend |= MUSB_CSR0_P_DATAEND;
819 musb->ep0_state =
828 handled = service_in_request(musb, &setup);
830 musb->ackpend = MUSB_CSR0_TXPKTRDY
832 musb->ep0_state =
842 musb_dbg(musb, "handled %d, csr %04x, ep0stage %s",
844 decode_ep0stage(musb->ep0_state));
855 handled = forward_to_driver(musb, &setup);
859 musb_dbg(musb, "stall (%d)", handled);
860 musb->ackpend |= MUSB_CSR0_P_SENDSTALL;
861 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
864 musb->ackpend);
865 musb->ackpend = 0;
881 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
907 struct musb *musb;
916 musb = ep->musb;
917 regs = musb->control_ep->regs;
920 req->musb = musb;
925 spin_lock_irqsave(&musb->lock, lockflags);
932 switch (musb->ep0_state) {
939 musb_dbg(musb, "ep0 request queued in state %d",
940 musb->ep0_state);
948 musb_dbg(musb, "queue to %s (%s), length=%d",
952 musb_ep_select(musb->mregs, 0);
955 if (musb->ep0_state == MUSB_EP0_STAGE_TX)
956 ep0_txstate(musb);
959 else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) {
963 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
965 musb->ackpend | MUSB_CSR0_P_DATAEND);
966 musb->ackpend = 0;
967 musb_g_ep0_giveback(ep->musb, r);
974 } else if (musb->ackpend) {
975 musb_writew(regs, MUSB_CSR0, musb->ackpend);
976 musb->ackpend = 0;
980 spin_unlock_irqrestore(&musb->lock, lockflags);
993 struct musb *musb;
1003 musb = ep->musb;
1004 base = musb->mregs;
1005 regs = musb->control_ep->regs;
1008 spin_lock_irqsave(&musb->lock, flags);
1016 csr = musb->ackpend;
1018 switch (musb->ep0_state) {
1037 musb->ep0_state = MUSB_EP0_STAGE_IDLE;
1038 musb->ackpend = 0;
1041 musb_dbg(musb, "ep0 can't halt in state %d", musb->ep0_state);
1046 spin_unlock_irqrestore(&musb->lock, flags);