Lines Matching refs:rx
85 /* zero out entire rx state RAM entry for the channel */
86 static void cppi_reset_rx(struct cppi_rx_stateram __iomem *rx)
88 musb_writel(&rx->rx_skipbytes, 0, 0);
89 musb_writel(&rx->rx_head, 0, 0);
90 musb_writel(&rx->rx_sop, 0, 0);
91 musb_writel(&rx->rx_current, 0, 0);
92 musb_writel(&rx->rx_buf_current, 0, 0);
93 musb_writel(&rx->rx_len_len, 0, 0);
94 musb_writel(&rx->rx_cnt_cnt, 0, 0);
165 for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
166 controller->rx[i].transmit = false;
167 controller->rx[i].index = i;
173 for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
174 cppi_pool_init(controller, controller->rx + i);
179 /* initialise tx/rx channel head pointers to zero */
190 for (i = 0; i < ARRAY_SIZE(controller->rx); i++) {
191 struct cppi_channel *rx_ch = controller->rx + i;
192 struct cppi_rx_stateram __iomem *rx;
196 rx = tibase + DAVINCI_RXCPPI_STATERAM_OFFSET(i);
197 rx_ch->state_ram = rx;
198 cppi_reset_rx(rx);
207 /* enable tx/rx CPPI control */
211 /* disable RNDIS mode, also host rx RNDIS autorequest */
243 for (i = 0; i < ARRAY_SIZE(controller->rx); i++)
244 cppi_pool_free(controller->rx + i);
250 /*disable tx/rx cppi */
307 if (index >= ARRAY_SIZE(controller->rx)) {
311 cppi_ch = controller->rx + index;
355 struct cppi_rx_stateram __iomem *rx = c->state_ram;
368 musb_readl(&rx->rx_skipbytes, 0),
369 musb_readl(&rx->rx_head, 0),
370 musb_readl(&rx->rx_sop, 0),
371 musb_readl(&rx->rx_current, 0),
373 musb_readl(&rx->rx_buf_current, 0),
374 musb_readl(&rx->rx_len_len, 0),
375 musb_readl(&rx->rx_cnt_cnt, 0),
376 musb_readl(&rx->rx_complete, 0)
438 static void cppi_dump_rxq(int level, const char *tag, struct cppi_channel *rx)
442 cppi_dump_rx(level, rx, tag);
443 if (rx->last_processed)
444 cppi_dump_rxbd("last", rx->last_processed);
445 for (bd = rx->head; bd; bd = bd->next)
453 static inline int cppi_autoreq_update(struct cppi_channel *rx,
464 val = tmp & ~((0x3) << (rx->index * 2));
472 val |= ((0x3) << (rx->index * 2));
476 val |= ((0x1) << (rx->index * 2));
495 if (n_bds && rx->channel.actual_len) {
496 void __iomem *regs = rx->hw_ep->regs;
731 * try rx rndis mode
749 * @rx: dma channel
762 cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
764 unsigned maxpacket = rx->maxpacket;
765 dma_addr_t addr = rx->buf_dma + rx->offset;
766 size_t length = rx->buf_len - rx->offset;
772 struct cppi_rx_stateram __iomem *rx_ram = rx->state_ram;
809 n_bds = cppi_autoreq_update(rx, tibase, onepacket, n_bds);
811 cppi_rndis_update(rx, 1, musb->ctrl_base, is_rndis);
817 rx->index, maxpacket,
823 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
826 rx->channel.actual_len, rx->buf_len);
831 bd = cppi_bd_alloc(rx);
832 rx->head = bd;
839 bd = cppi_bd_alloc(rx);
855 rx->offset += bd_len;
866 WARNING("rx dma%d -- no BDs? need %d\n", rx->index, n_bds);
869 WARNING("rx dma%d -- only %d of %d BDs\n", rx->index, i, n_bds);
874 bd = rx->head;
875 rx->tail = tail;
885 for (d = rx->head; d; d = d->next)
889 tail = rx->last_processed;
895 core_rxirq_enable(tibase, rx->index + 1);
910 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
915 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
919 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
923 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
927 rx->index, i, n_bds);
929 DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
933 cppi_dump_rx(4, rx, "/S");
1003 struct cppi_channel *rx = &cppi->rx[ch];
1004 struct cppi_rx_stateram __iomem *state = rx->state_ram;
1006 struct cppi_descriptor *last = rx->last_processed;
1011 void __iomem *regs = rx->hw_ep->regs;
1014 cppi_dump_rx(6, rx, "/K");
1016 bd = last ? last->next : rx->head;
1035 rx->channel.actual_len);
1053 musb_dbg(musb, "rx short %d/%d (%d)",
1055 rx->channel.actual_len);
1074 rx->channel.actual_len += len;
1076 cppi_bd_free(rx, last);
1083 rx->last_processed = last;
1089 if (safe2ack == 0 || safe2ack == rx->last_processed->dma)
1092 cppi_bd_free(rx, last);
1093 rx->last_processed = NULL;
1098 WARN_ON(rx->head);
1100 musb_ep_select(cppi->mregs, rx->index + 1);
1104 rx->index,
1105 rx->head, rx->tail,
1106 rx->last_processed
1108 rx->last_processed->dma
1112 cppi_dump_rxq(4, "/what?", rx);
1118 rx->head = bd;
1123 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
1130 csr = musb_readw(rx->hw_ep->regs, MUSB_RXCSR);
1133 rx->head = NULL;
1134 rx->tail = NULL;
1137 cppi_dump_rx(6, rx, completed ? "/completed" : "/cleaned");
1147 u32 rx, tx;
1158 rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);
1160 if (!tx && !rx) {
1166 musb_dbg(musb, "CPPI IRQ Tx%x Rx%x", tx, rx);
1222 * REVISIT use the same ack strategy as rx
1259 for (index = 0; rx; rx = rx >> 1, index++) {
1261 if (rx & 1) {
1264 rx_ch = cppi->rx + index;