Lines Matching refs:tmp8
1413 u8 tmp8;
1415 ret = GETIREG(SISSR, 0x16, &tmp8);
1417 tmp8 &= 0x3f;
1418 ret |= SETIREG(SISSR, 0x16, tmp8);
1419 tmp8 |= 0x80;
1420 ret |= SETIREG(SISSR, 0x16, tmp8);
1422 tmp8 |= 0xc0;
1423 ret |= SETIREG(SISSR, 0x16, tmp8);
1424 tmp8 &= 0x0f;
1425 ret |= SETIREG(SISSR, 0x16, tmp8);
1426 tmp8 |= 0x80;
1427 ret |= SETIREG(SISSR, 0x16, tmp8);
1428 tmp8 &= 0x0f;
1429 ret |= SETIREG(SISSR, 0x16, tmp8);
1430 tmp8 |= 0xd0;
1431 ret |= SETIREG(SISSR, 0x16, tmp8);
1432 tmp8 &= 0x0f;
1433 ret |= SETIREG(SISSR, 0x16, tmp8);
1434 tmp8 |= 0xa0;
1435 ret |= SETIREG(SISSR, 0x16, tmp8);
1754 u8 sr31, cr63, tmp8;
1795 GETREG(SISINPSTAT, &tmp8);
1799 GETREG(SISINPSTAT, &tmp8);
1802 GETREG(SISINPSTAT, &tmp8);
1804 GETREG(SISINPSTAT, &tmp8);
1834 tmp8 = du >> 8;
1835 SETIREG(SISSR, 0x10, tmp8);
1881 u8 tmp8, ramtype;
1915 ret = GETREG(SISVGAEN, &tmp8);
1916 ret |= SETREG(SISVGAEN, (tmp8 | 0x01));
1919 ret |= GETREG(SISMISCR, &tmp8);
1920 ret |= SETREG(SISMISCW, (tmp8 | 0x01));
1997 ret |= GETIREG(SISSR, 0x13, &tmp8);
1998 tmp8 >>= 4;
2005 tmp8 = (tmp32 == 0x100000) ? 0x33 : 0x03;
2006 ret |= SETIREG(SISSR, 0x25, tmp8);
2007 tmp8 = (tmp32 == 0x100000) ? 0xaa : 0x88;
2008 ret |= SETIREG(SISCR, 0x49, tmp8);
2079 u8 tmp8, tmp82, ramtype;
2088 sisusb_getidxreg(sisusb, SISSR, 0x14, &tmp8);
2091 sisusb->vramsize = (1 << ((tmp8 & 0xf0) >> 4)) * 1024 * 1024;
2093 switch ((tmp8 >> 2) & 0x03) {
2099 bw = busSDR[(tmp8 & 0x03)];
2105 bw = busSDR[(tmp8 & 0x03)];
2110 bw = busDDRA[(tmp8 & 0x03)];
2115 bw = busDDR[(tmp8 & 0x03)];