Lines Matching refs:reset
206 * PCI config regs). HC does NOT drive a USB reset on the downstream ports.
215 /* light reset (port status stays unchanged) - reset completed when this is 0 */
255 /* true: Controller Not Ready to accept doorbell or op reg writes after reset */
257 /* true: internal Host Controller Error - SW needs to reset and reinitialize */
302 /* true: port reset signaling asserted */
326 * 0 - undefined speed - port hasn't be initialized by a reset yet
365 /* true: warm reset for a USB 3.0 device is done. A "hot" reset puts the port
366 * into an enabled state, and the device into the default state. A "warm" reset
368 * SW can also look at the Port Reset register to see when warm reset is done.
373 /* true: reset change - 1 to 0 transition of PORT_RESET */
396 * Sx state. Warm port reset should be perfomed to clear this bit and move port
409 /* Initiate a warm port reset - complete when PORT_WRC is '1' */
1787 /* optional reset controller */
1788 struct reset_control *reset;
1856 * commands, reset device commands, disable slot commands, and address device
1938 int (*reset)(struct usb_hcd *hcd);