Lines Matching refs:xhci_pdev
1043 void usb_enable_intel_xhci_ports(struct pci_dev *xhci_pdev)
1052 if (xhci_pdev->subsystem_vendor == PCI_VENDOR_ID_SONY &&
1053 xhci_pdev->subsystem_device == 0x90a8)
1073 dev_warn(&xhci_pdev->dev,
1075 dev_warn(&xhci_pdev->dev,
1077 usb_disable_xhci_ports(xhci_pdev);
1084 pci_read_config_dword(xhci_pdev, USB_INTEL_USB3PRM,
1087 dev_dbg(&xhci_pdev->dev, "Configurable ports to enable SuperSpeed: 0x%x\n",
1094 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
1097 pci_read_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN,
1099 dev_dbg(&xhci_pdev->dev,
1107 pci_read_config_dword(xhci_pdev, USB_INTEL_USB2PRM,
1110 dev_dbg(&xhci_pdev->dev, "Configurable USB 2.0 ports to hand over to xCHI: 0x%x\n",
1117 pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
1120 pci_read_config_dword(xhci_pdev, USB_INTEL_XUSB2PR,
1122 dev_dbg(&xhci_pdev->dev,
1128 void usb_disable_xhci_ports(struct pci_dev *xhci_pdev)
1130 pci_write_config_dword(xhci_pdev, USB_INTEL_USB3_PSSEN, 0x0);
1131 pci_write_config_dword(xhci_pdev, USB_INTEL_XUSB2PR, 0x0);