Lines Matching defs:pxa_ohci
141 static int pxa27x_ohci_select_pmm(struct pxa27x_ohci *pxa_ohci, int mode)
143 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);
144 uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB);
168 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);
169 __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB);
173 static int pxa27x_ohci_set_vbus_power(struct pxa27x_ohci *pxa_ohci,
176 struct regulator *vbus = pxa_ohci->vbus[port];
182 if (enable && !pxa_ohci->vbus_enabled[port])
184 else if (!enable && pxa_ohci->vbus_enabled[port])
190 pxa_ohci->vbus_enabled[port] = enable;
198 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
210 ret = pxa27x_ohci_set_vbus_power(pxa_ohci, wIndex - 1,
221 static inline void pxa27x_setup_hc(struct pxa27x_ohci *pxa_ohci,
224 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);
225 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA);
257 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
258 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA);
261 static inline void pxa27x_reset_hc(struct pxa27x_ohci *pxa_ohci)
263 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR);
265 __raw_writel(uhchr | UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);
267 __raw_writel(uhchr & ~UHCHR_FHR, pxa_ohci->mmio_base + UHCHR);
276 static int pxa27x_start_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev)
285 retval = clk_prepare_enable(pxa_ohci->clk);
289 pxa27x_reset_hc(pxa_ohci);
291 uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) | UHCHR_FSBIR;
292 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
294 while (__raw_readl(pxa_ohci->mmio_base + UHCHR) & UHCHR_FSBIR)
297 pxa27x_setup_hc(pxa_ohci, inf);
303 clk_disable_unprepare(pxa_ohci->clk);
310 uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR) & ~UHCHR_SSE;
311 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR);
312 __raw_writel(UHCHIE_UPRIE | UHCHIE_RWIE, pxa_ohci->mmio_base + UHCHIE);
319 static void pxa27x_stop_hc(struct pxa27x_ohci *pxa_ohci, struct device *dev)
333 pxa27x_reset_hc(pxa_ohci);
336 uhccoms = __raw_readl(pxa_ohci->mmio_base + UHCCOMS) | 0x01;
337 __raw_writel(uhccoms, pxa_ohci->mmio_base + UHCCOMS);
340 clk_disable_unprepare(pxa_ohci->clk);
425 struct pxa27x_ohci *pxa_ohci;
464 pxa_ohci = to_pxa27x_ohci(hcd);
465 pxa_ohci->clk = usb_clk;
466 pxa_ohci->mmio_base = (void __iomem *)hcd->regs;
475 pxa_ohci->vbus[i] = devm_regulator_get(&pdev->dev, name);
478 retval = pxa27x_start_hc(pxa_ohci, &pdev->dev);
485 pxa27x_ohci_select_pmm(pxa_ohci, inf->port_mode);
500 pxa27x_stop_hc(pxa_ohci, &pdev->dev);
523 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
527 pxa27x_stop_hc(pxa_ohci, &pdev->dev);
530 pxa27x_ohci_set_vbus_power(pxa_ohci, i, false);
542 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
556 pxa27x_stop_hc(pxa_ohci, dev);
563 struct pxa27x_ohci *pxa_ohci = to_pxa27x_ohci(hcd);
572 status = pxa27x_start_hc(pxa_ohci, dev);
577 pxa27x_ohci_select_pmm(pxa_ohci, inf->port_mode);