Lines Matching refs:val
1282 u32 val;
1289 val = isp116x_read_reg32(isp116x, HCRHDESCA);
1290 val &= ~(RH_A_NPS | RH_A_PSM);
1291 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1305 u32 val;
1314 val = isp116x_read_reg16(isp116x, HCCHIPID);
1315 if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
1316 ERR("Invalid chip ID %04x\n", val);
1328 val = HCHWCFG_INT_ENABLE | HCHWCFG_DBWIDTH(1);
1330 val |= HCHWCFG_15KRSEL;
1333 val |= HCHWCFG_CLKNOTSTOP;
1335 val |= HCHWCFG_ANALOG_OC;
1337 val |= HCHWCFG_INT_POL;
1339 val |= HCHWCFG_INT_TRIGGER;
1340 isp116x_write_reg16(isp116x, HCHWCFG, val);
1343 val = (25 << 24) & RH_A_POTPGT;
1347 val |= RH_A_PSM;
1349 val |= RH_A_OCPM;
1350 isp116x_write_reg32(isp116x, HCRHDESCA, val);
1353 val = RH_B_PPCM;
1354 isp116x_write_reg32(isp116x, HCRHDESCB, val);
1357 val = 0;
1361 val |= RH_HS_DRWE;
1363 isp116x_write_reg32(isp116x, HCRHSTATUS, val);
1379 val = HCCONTROL_USB_OPER;
1381 val |= HCCONTROL_RWE;
1382 isp116x_write_reg32(isp116x, HCCONTROL, val);
1399 u32 val;
1403 val = isp116x_read_reg32(isp116x, HCCONTROL);
1405 switch (val & HCCONTROL_HCFS) {
1408 val &= (~HCCONTROL_HCFS & ~HCCONTROL_RWE);
1409 val |= HCCONTROL_USB_SUSPEND;
1411 val |= HCCONTROL_RWE;
1415 isp116x_write_reg32(isp116x, HCCONTROL, val);
1422 (val & ~HCCONTROL_HCFS) |
1439 u32 val;
1444 val = isp116x_read_reg32(isp116x, HCCONTROL);
1445 switch (val & HCCONTROL_HCFS) {
1447 val &= ~HCCONTROL_HCFS;
1448 val |= HCCONTROL_USB_RESUME;
1449 isp116x_write_reg32(isp116x, HCCONTROL, val);
1470 val = isp116x->rhdesca & RH_A_NDP;
1471 while (val--) {
1473 isp116x_read_reg32(isp116x, val ? HCRHPORT2 : HCRHPORT1);
1477 DBG("%s: Resuming port %d\n", __func__, val);
1478 isp116x_write_reg32(isp116x, RH_PS_POCI, val
1488 val = isp116x_read_reg32(isp116x, HCCONTROL);
1490 (val & ~HCCONTROL_HCFS) | HCCONTROL_USB_OPER);