Lines Matching defs:etd_num
104 static void etd_writel(struct imx21 *imx21, int etd_num, int dword, u32 value)
106 writel(value, imx21->regs + USB_ETD_DWORD(etd_num, dword));
109 static u32 etd_readl(struct imx21 *imx21, int etd_num, int dword)
111 return readl(imx21->regs + USB_ETD_DWORD(etd_num, dword));
215 int etd_num, struct urb *urb, u8 dir, u16 maxpacket)
217 etd_writel(imx21, etd_num, 0,
254 static void activate_etd(struct imx21 *imx21, int etd_num, u8 dir)
256 u32 etd_mask = 1 << etd_num;
257 struct etd_priv *etd = &imx21->etd[etd_num];
310 writel(etd->dma_handle, imx21->regs + USB_ETDSMSA(etd_num));
331 etd->submitted_dwords[i] = etd_readl(imx21, etd_num, i);
396 int etd_num = etd - &imx21->etd[0];
397 u32 maxpacket = etd_readl(imx21, etd_num, 1) >> DW1_YBUFSRTAD;
398 u8 dir = (etd_readl(imx21, etd_num, 2) >> DW2_DIRPID) & 0x03;
401 etd_num);
402 etd_writel(imx21, etd_num, 1,
407 activate_etd(imx21, etd_num, dir);
474 int etd_num = ep_priv->etd[i];
476 if (etd_num < 0)
479 etd = &imx21->etd[etd_num];
485 free_etd(imx21, etd_num);
490 "assigning idle etd %d for queued request\n", etd_num);
494 reset_etd(imx21, etd_num);
496 ep_priv->etd[i] = etd_num;
559 int etd_num;
569 etd_num = ep_priv->etd[i];
570 if (etd_num < 0)
573 etd = &imx21->etd[etd_num];
605 setup_etd_dword0(imx21, etd_num, td->urb, dir, etd->dmem_size);
606 etd_writel(imx21, etd_num, 1, etd->dmem_offset);
607 etd_writel(imx21, etd_num, 2,
610 etd_writel(imx21, etd_num, 3,
614 activate_etd(imx21, etd_num, dir);
618 static void isoc_etd_done(struct usb_hcd *hcd, int etd_num)
621 int etd_mask = 1 << etd_num;
622 struct etd_priv *etd = imx21->etd + etd_num;
633 disactivate_etd(imx21, etd_num);
635 cc = (etd_readl(imx21, etd_num, 3) >> DW3_COMPCODE0) & 0xf;
636 bytes_xfrd = etd_readl(imx21, etd_num, 3) & 0x3ff;
655 bytes_xfrd, td->len, urb, etd_num, isoc_index);
702 int etd_num;
707 etd_num = alloc_etd(imx21);
708 if (etd_num < 0)
711 ep_priv->etd[i] = etd_num;
712 imx21->etd[etd_num].ep = ep_priv->ep;
876 int etd_num = ep_priv->etd[i];
877 if (etd_num != -1 && imx21->etd[etd_num].urb == urb) {
878 struct etd_priv *etd = imx21->etd + etd_num;
880 reset_etd(imx21, etd_num);
904 int etd_num = ep_priv->etd[0];
915 if (etd_num < 0) {
919 if (readl(imx21->regs + USBH_ETDENSET) & (1 << etd_num))
920 dev_err(imx21->dev, "submitting to active ETD %d\n", etd_num);
922 etd = &imx21->etd[etd_num];
980 setup_etd_dword0(imx21, etd_num, urb, dir, maxpacket);
982 etd_writel(imx21, etd_num, 2,
998 etd_writel(imx21, etd_num, 3,
1009 etd_writel(imx21, etd_num, 1, (u32)maxpacket << 16);
1011 dev_dbg(imx21->dev, "Queuing etd %d for DMEM\n", etd_num);
1017 etd_writel(imx21, etd_num, 1,
1025 etd_num, count, dir != TD_DIR_IN ? "out" : "in");
1026 activate_etd(imx21, etd_num, dir);
1030 static void nonisoc_etd_done(struct usb_hcd *hcd, int etd_num)
1033 struct etd_priv *etd = &imx21->etd[etd_num];
1035 u32 etd_mask = 1 << etd_num;
1042 disactivate_etd(imx21, etd_num);
1044 dir = (etd_readl(imx21, etd_num, 0) >> DW0_DIRECT) & 0x3;
1045 cc = (etd_readl(imx21, etd_num, 2) >> DW2_COMPCODE) & 0xf;
1046 bytes_xfrd = etd->len - (etd_readl(imx21, etd_num, 3) & 0x1fffff);
1051 (etd_readl(imx21, etd_num, 0) >> DW0_TOGCRY) & 0x1);
1274 int etd_num = ep_priv->etd[0];
1275 if (etd_num != -1) {
1276 struct etd_priv *etd = &imx21->etd[etd_num];
1278 disactivate_etd(imx21, etd_num);
1302 int etd_num;
1308 for (etd_num = 0; etd_num < USB_NUM_ETD; etd_num++) {
1309 u32 etd_mask = 1 << etd_num;
1312 struct etd_priv *etd = &imx21->etd[etd_num];
1343 cc = etd_readl(imx21, etd_num, 2) >> DW2_COMPCODE;
1350 dword0 = etd_readl(imx21, etd_num, 0);
1353 etd_num, dword0 & 0x7F,
1376 etd_num, etd->ep, etd->urb);
1377 disactivate_etd(imx21, etd_num);
1382 isoc_etd_done(hcd, etd_num);
1384 nonisoc_etd_done(hcd, etd_num);