Lines Matching refs:ehci
29 #include "ehci.h"
36 #define DRV_NAME "tegra-ehci"
104 struct ehci_hcd *ehci,
114 spin_lock_irqsave(&ehci->lock, flags);
115 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
117 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
118 spin_unlock_irqrestore(&ehci->lock, flags);
125 temp = ehci_readl(ehci, portsc_reg);
127 ehci_writel(ehci, temp, portsc_reg);
130 ehci_writel(ehci, temp, portsc_reg);
141 temp = ehci_readl(ehci, portsc_reg);
154 ehci_writel(ehci, PORT_CSC, portsc_reg);
160 temp = ehci_readl(ehci, &ehci->regs->status);
161 ehci_writel(ehci, temp, &ehci->regs->status);
164 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
177 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
178 struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
184 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
186 spin_lock_irqsave(&ehci->lock, flags);
189 temp = ehci_readl(ehci, status_reg);
198 temp = ehci_readl(ehci, status_reg);
206 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
212 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
216 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
223 spin_unlock_irqrestore(&ehci->lock, flags);
224 return tegra_ehci_internal_port_reset(ehci, status_reg);
236 temp = ehci_readl(ehci, status_reg);
248 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
252 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
253 set_bit(wIndex-1, &ehci->resuming_ports);
255 spin_unlock_irqrestore(&ehci->lock, flags);
257 spin_lock_irqsave(&ehci->lock, flags);
260 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
262 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
265 ehci->reset_done[wIndex-1] = 0;
266 clear_bit(wIndex-1, &ehci->resuming_ports);
272 spin_unlock_irqrestore(&ehci->lock, flags);
278 spin_unlock_irqrestore(&ehci->lock, flags);
376 { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config },
377 { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config },
387 struct ehci_hcd *ehci;
415 ehci = hcd_to_ehci(hcd);
416 tegra = (struct tegra_ehci_hcd *)ehci->priv;
422 dev_err(&pdev->dev, "Can't get ehci clock\n");
429 dev_err(&pdev->dev, "Can't get ehci reset\n");
464 ehci->caps = hcd->regs + 0x100;
465 ehci->has_hostpc = soc_config->has_hostpc;
544 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
558 txfifothresh = ehci->has_hostpc ? 0x10 : 10;
559 ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);