Lines Matching refs:ehci_readl
59 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
73 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
110 status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
131 if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
140 if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
168 temp = ehci_readl(ehci, hostpc_reg);
179 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
200 temp = ehci_readl(ehci, hostpc_reg);
258 u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
322 t3 = ehci_readl(ehci, hostpc_reg);
324 t3 = ehci_readl(ehci, hostpc_reg);
362 ehci_readl(ehci, &ehci->regs->intr_enable);
403 power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
429 temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
451 temp = ehci_readl(ehci, hostpc_reg);
466 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
490 temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
507 (void) ehci_readl(ehci, &ehci->regs->intr_enable);
552 port_status = ehci_readl(ehci, status_reg);
659 ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
664 temp = ehci_readl(ehci, &ehci->regs->port_status[i]);
919 temp = ehci_readl(ehci, status_reg);
955 temp1 = ehci_readl(ehci, hostpc_reg);
992 ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
1008 temp = ehci_readl(ehci, status_reg);
1031 temp = ehci_readl(ehci, status_reg);
1072 temp = ehci_readl(ehci, status_reg);
1095 ehci_readl(ehci, status_reg));
1105 temp = ehci_readl(ehci, status_reg);
1118 temp1 = ehci_readl(ehci, hostpc_reg);
1176 temp = ehci_readl(ehci, status_reg);
1200 temp1 = ehci_readl(ehci, hostpc_reg);
1203 temp1 = ehci_readl(ehci, hostpc_reg);
1285 temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
1295 temp = ehci_readl(ehci, status_reg);
1303 ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1334 return ehci_readl(ehci, reg) & PORT_OWNER;
1341 u32 temp = ehci_readl(ehci, status_reg) & ~PORT_RWC_BITS;