Lines Matching refs:ehci
28 #include "ehci.h"
29 #include "ehci-fsl.h"
32 #define DRV_NAME "fsl-ehci"
153 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
156 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
157 hcd, ehci, hcd->usb_phy);
161 &ehci_to_hcd(ehci)->self);
202 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
212 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
289 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
301 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
303 struct usb_hcd *hcd = ehci_to_hcd(ehci);
326 ehci->has_fsl_hs_errata = 1;
329 ehci->has_fsl_susp_errata = 1;
340 ehci->has_fsl_port_bug = 1;
366 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
368 if (ehci_fsl_usb_setup(ehci))
377 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
384 ehci->big_endian_desc = pdata->big_endian_desc;
385 ehci->big_endian_mmio = pdata->big_endian_mmio;
388 ehci->caps = hcd->regs + 0x100;
396 ehci->need_oc_pp_cycle = 1;
411 ehci_writel(ehci, SBUSCFG_INCR8,
415 retval = ehci_fsl_reinit(ehci);
420 struct ehci_hcd ehci;
434 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
439 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
441 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
461 ehci->rh_state = EHCI_RH_SUSPENDED;
468 tmp = ehci_readl(ehci, &ehci->regs->command);
470 ehci_writel(ehci, tmp, &ehci->regs->command);
473 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
475 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
476 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
477 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
478 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
479 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
480 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
482 ehci_readl(ehci, &ehci->regs->configured_flag);
483 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
484 pdata->pm_usbgenctrl = ehci_readl(ehci,
488 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
493 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
495 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
503 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
531 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
533 ehci_writel(ehci, pdata->pm_usbgenctrl,
535 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
538 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
541 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
542 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
543 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
544 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
545 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
546 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
547 ehci_writel(ehci, pdata->pm_configured_flag,
548 &ehci->regs->configured_flag);
549 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
552 ehci->rh_state = EHCI_RH_RUNNING;
555 tmp = ehci_readl(ehci, &ehci->regs->command);
557 ehci_writel(ehci, tmp, &ehci->regs->command);
577 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
579 return container_of(ehci, struct ehci_fsl, ehci);
606 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
614 ehci_prepare_ports_for_controller_resume(ehci);
623 ehci_reset(ehci);
624 ehci_fsl_reinit(ehci);
651 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
660 status = readl(&ehci->regs->port_status[port]);
665 if (ehci_is_TDI(ehci)) {
668 &ehci->regs->port_status[port]);
670 writel(PORT_RESET, &ehci->regs->port_status[port]);
721 .name = "fsl-ehci",