Lines Matching refs:UDCCR
105 tmp = udc_readl(udc, UDCCR);
192 tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR);
272 * - we rely on UDCCR register "active interface" and "active altsetting".
360 * udc_set_mask_UDCCR - set bits in UDCCR
362 * @mask: bits to set in UDCCR
364 * Sets bits in UDCCR, leaving DME and FST bits as they were.
368 u32 udccr = udc_readl(udc, UDCCR);
369 udc_writel(udc, UDCCR,
374 * udc_clear_mask_UDCCR - clears bits in UDCCR
376 * @mask: bit to clear in UDCCR
378 * Clears bits in UDCCR, leaving DME and FST bits as they were.
382 u32 udccr = udc_readl(udc, UDCCR);
383 udc_writel(udc, UDCCR,
390 * @mask: bits to set in UDCCR
530 * Find the physical pxa27x ep, and setup its UDCCR
545 udc_ep_writel(ep, UDCCR, new_udccr);
1460 if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0)
1712 if (udc_readl(udc, UDCCR) & UDCCR_EMCE)
2215 u32 udccr = udc_readl(udc, UDCCR);
2239 u32 udccr = udc_readl(udc, UDCCR);
2270 u32 udccr = udc_readl(udc, UDCCR);
2274 "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr);
2471 if (udc_readl(udc, UDCCR) & UDCCR_UDE)
2487 * Suspends udc : saves configuration registers (UDCCR*), then disables the udc
2512 * Resumes udc : restores configuration registers (UDCCR*), then enables the udc