Lines Matching refs:info
529 static void hdlcdev_tx_done(SLMP_INFO *info);
530 static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size);
531 static int hdlcdev_init(SLMP_INFO *info);
532 static void hdlcdev_exit(SLMP_INFO *info);
537 static int get_stats(SLMP_INFO *info, struct mgsl_icount __user *user_icount);
538 static int get_params(SLMP_INFO *info, MGSL_PARAMS __user *params);
539 static int set_params(SLMP_INFO *info, MGSL_PARAMS __user *params);
540 static int get_txidle(SLMP_INFO *info, int __user *idle_mode);
541 static int set_txidle(SLMP_INFO *info, int idle_mode);
542 static int tx_enable(SLMP_INFO *info, int enable);
543 static int tx_abort(SLMP_INFO *info);
544 static int rx_enable(SLMP_INFO *info, int enable);
545 static int modem_input_wait(SLMP_INFO *info,int arg);
546 static int wait_mgsl_event(SLMP_INFO *info, int __user *mask_ptr);
552 static int add_device(SLMP_INFO *info);
554 static int claim_resources(SLMP_INFO *info);
555 static void release_resources(SLMP_INFO *info);
557 static int startup(SLMP_INFO *info);
558 static int block_til_ready(struct tty_struct *tty, struct file * filp,SLMP_INFO *info);
560 static void shutdown(SLMP_INFO *info);
561 static void program_hw(SLMP_INFO *info);
562 static void change_params(SLMP_INFO *info);
564 static bool init_adapter(SLMP_INFO *info);
565 static bool register_test(SLMP_INFO *info);
566 static bool irq_test(SLMP_INFO *info);
567 static bool loopback_test(SLMP_INFO *info);
568 static int adapter_test(SLMP_INFO *info);
569 static bool memory_test(SLMP_INFO *info);
571 static void reset_adapter(SLMP_INFO *info);
572 static void reset_port(SLMP_INFO *info);
573 static void async_mode(SLMP_INFO *info);
574 static void hdlc_mode(SLMP_INFO *info);
576 static void rx_stop(SLMP_INFO *info);
577 static void rx_start(SLMP_INFO *info);
578 static void rx_reset_buffers(SLMP_INFO *info);
579 static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last);
580 static bool rx_get_frame(SLMP_INFO *info);
582 static void tx_start(SLMP_INFO *info);
583 static void tx_stop(SLMP_INFO *info);
584 static void tx_load_fifo(SLMP_INFO *info);
585 static void tx_set_idle(SLMP_INFO *info);
586 static void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count);
588 static void get_signals(SLMP_INFO *info);
589 static void set_signals(SLMP_INFO *info);
590 static void enable_loopback(SLMP_INFO *info, int enable);
591 static void set_rate(SLMP_INFO *info, u32 data_rate);
593 static int bh_action(SLMP_INFO *info);
595 static void bh_receive(SLMP_INFO *info);
596 static void bh_transmit(SLMP_INFO *info);
597 static void bh_status(SLMP_INFO *info);
598 static void isr_timer(SLMP_INFO *info);
599 static void isr_rxint(SLMP_INFO *info);
600 static void isr_rxrdy(SLMP_INFO *info);
601 static void isr_txint(SLMP_INFO *info);
602 static void isr_txrdy(SLMP_INFO *info);
603 static void isr_rxdmaok(SLMP_INFO *info);
604 static void isr_rxdmaerror(SLMP_INFO *info);
605 static void isr_txdmaok(SLMP_INFO *info);
606 static void isr_txdmaerror(SLMP_INFO *info);
607 static void isr_io_pin(SLMP_INFO *info, u16 status);
609 static int alloc_dma_bufs(SLMP_INFO *info);
610 static void free_dma_bufs(SLMP_INFO *info);
611 static int alloc_buf_list(SLMP_INFO *info);
612 static int alloc_frame_bufs(SLMP_INFO *info, SCADESC *list, SCADESC_EX *list_ex,int count);
613 static int alloc_tmp_rx_buf(SLMP_INFO *info);
614 static void free_tmp_rx_buf(SLMP_INFO *info);
616 static void load_pci_memory(SLMP_INFO *info, char* dest, const char* src, unsigned short count);
617 static void trace_block(SLMP_INFO *info, const char* data, int count, int xmit);
621 static unsigned char read_reg(SLMP_INFO *info, unsigned char addr);
622 static void write_reg(SLMP_INFO *info, unsigned char addr, unsigned char val);
623 static u16 read_reg16(SLMP_INFO *info, unsigned char addr);
624 static void write_reg16(SLMP_INFO *info, unsigned char addr, u16 val);
625 static unsigned char read_status_reg(SLMP_INFO * info);
626 static void write_control_reg(SLMP_INFO * info);
664 static inline int sanity_check(SLMP_INFO *info,
673 if (!info) {
677 if (info->magic != MGSL_MAGIC) {
682 if (!info)
715 SLMP_INFO *info;
724 info = synclinkmp_device_list;
725 while (info && info->line != line)
726 info = info->next_device;
727 if (sanity_check(info, tty->name, "open"))
729 if (info->init_error) {
731 __FILE__, __LINE__, info->device_name,
732 info->init_error);
736 tty->driver_data = info;
738 return tty_port_install(&info->port, driver, tty);
745 SLMP_INFO *info = tty->driver_data;
749 info->port.tty = tty;
753 __FILE__,__LINE__,tty->driver->name, info->port.count);
755 info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
757 spin_lock_irqsave(&info->netlock, flags);
758 if (info->netcount) {
760 spin_unlock_irqrestore(&info->netlock, flags);
763 info->port.count++;
764 spin_unlock_irqrestore(&info->netlock, flags);
766 if (info->port.count == 1) {
768 retval = startup(info);
773 retval = block_til_ready(tty, filp, info);
777 __FILE__,__LINE__, info->device_name, retval);
783 __FILE__,__LINE__, info->device_name);
789 info->port.tty = NULL; /* tty layer will release tty struct */
790 if(info->port.count)
791 info->port.count--;
802 SLMP_INFO * info = tty->driver_data;
804 if (sanity_check(info, tty->name, "close"))
809 __FILE__,__LINE__, info->device_name, info->port.count);
811 if (tty_port_close_start(&info->port, tty, filp) == 0)
814 mutex_lock(&info->port.mutex);
815 if (tty_port_initialized(&info->port))
816 wait_until_sent(tty, info->timeout);
820 shutdown(info);
821 mutex_unlock(&info->port.mutex);
823 tty_port_close_end(&info->port, tty);
824 info->port.tty = NULL;
828 tty->driver->name, info->port.count);
836 SLMP_INFO *info = tty->driver_data;
841 __FILE__,__LINE__, info->device_name );
843 if (sanity_check(info, tty->name, "hangup"))
846 mutex_lock(&info->port.mutex);
848 shutdown(info);
850 spin_lock_irqsave(&info->port.lock, flags);
851 info->port.count = 0;
852 info->port.tty = NULL;
853 spin_unlock_irqrestore(&info->port.lock, flags);
854 tty_port_set_active(&info->port, 1);
855 mutex_unlock(&info->port.mutex);
857 wake_up_interruptible(&info->port.open_wait);
864 SLMP_INFO *info = tty->driver_data;
871 change_params(info);
875 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
876 spin_lock_irqsave(&info->lock,flags);
877 set_signals(info);
878 spin_unlock_irqrestore(&info->lock,flags);
883 info->serial_signals |= SerialSignal_DTR;
885 info->serial_signals |= SerialSignal_RTS;
886 spin_lock_irqsave(&info->lock,flags);
887 set_signals(info);
888 spin_unlock_irqrestore(&info->lock,flags);
912 SLMP_INFO *info = tty->driver_data;
917 __FILE__,__LINE__,info->device_name,count);
919 if (sanity_check(info, tty->name, "write"))
922 if (!info->tx_buf)
925 if (info->params.mode == MGSL_MODE_HDLC) {
926 if (count > info->max_frame_size) {
930 if (info->tx_active)
932 if (info->tx_count) {
935 tx_load_dma_buffer(info, info->tx_buf, info->tx_count);
938 ret = info->tx_count = count;
939 tx_load_dma_buffer(info, buf, count);
945 min(info->max_frame_size - info->tx_count - 1,
946 info->max_frame_size - info->tx_put));
950 memcpy(info->tx_buf + info->tx_put, buf, c);
952 spin_lock_irqsave(&info->lock,flags);
953 info->tx_put += c;
954 if (info->tx_put >= info->max_frame_size)
955 info->tx_put -= info->max_frame_size;
956 info->tx_count += c;
957 spin_unlock_irqrestore(&info->lock,flags);
964 if (info->params.mode == MGSL_MODE_HDLC) {
966 ret = info->tx_count = 0;
969 tx_load_dma_buffer(info, info->tx_buf, info->tx_count);
972 if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
973 spin_lock_irqsave(&info->lock,flags);
974 if (!info->tx_active)
975 tx_start(info);
976 spin_unlock_irqrestore(&info->lock,flags);
982 __FILE__,__LINE__,info->device_name,ret);
990 SLMP_INFO *info = tty->driver_data;
996 __FILE__,__LINE__,info->device_name,ch);
999 if (sanity_check(info, tty->name, "put_char"))
1002 if (!info->tx_buf)
1005 spin_lock_irqsave(&info->lock,flags);
1007 if ( (info->params.mode != MGSL_MODE_HDLC) ||
1008 !info->tx_active ) {
1010 if (info->tx_count < info->max_frame_size - 1) {
1011 info->tx_buf[info->tx_put++] = ch;
1012 if (info->tx_put >= info->max_frame_size)
1013 info->tx_put -= info->max_frame_size;
1014 info->tx_count++;
1019 spin_unlock_irqrestore(&info->lock,flags);
1027 SLMP_INFO *info = tty->driver_data;
1032 __FILE__,__LINE__, info->device_name, ch );
1034 if (sanity_check(info, tty->name, "send_xchar"))
1037 info->x_char = ch;
1040 spin_lock_irqsave(&info->lock,flags);
1041 if (!info->tx_enabled)
1042 tx_start(info);
1043 spin_unlock_irqrestore(&info->lock,flags);
1051 SLMP_INFO * info = tty->driver_data;
1054 if (!info )
1059 __FILE__,__LINE__, info->device_name );
1061 if (sanity_check(info, tty->name, "wait_until_sent"))
1064 if (!tty_port_initialized(&info->port))
1075 if ( info->params.data_rate ) {
1076 char_time = info->timeout/(32 * 5);
1085 if ( info->params.mode == MGSL_MODE_HDLC ) {
1086 while (info->tx_active) {
1098 while ( info->tx_active && info->tx_enabled) {
1110 __FILE__,__LINE__, info->device_name );
1117 SLMP_INFO *info = tty->driver_data;
1120 if (sanity_check(info, tty->name, "write_room"))
1123 if (info->params.mode == MGSL_MODE_HDLC) {
1124 ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
1126 ret = info->max_frame_size - info->tx_count - 1;
1133 __FILE__, __LINE__, info->device_name, ret);
1142 SLMP_INFO *info = tty->driver_data;
1147 __FILE__,__LINE__,info->device_name,info->tx_count);
1149 if (sanity_check(info, tty->name, "flush_chars"))
1152 if (info->tx_count <= 0 || tty->stopped || tty->hw_stopped ||
1153 !info->tx_buf)
1158 __FILE__,__LINE__,info->device_name );
1160 spin_lock_irqsave(&info->lock,flags);
1162 if (!info->tx_active) {
1163 if ( (info->params.mode == MGSL_MODE_HDLC) &&
1164 info->tx_count ) {
1168 tx_load_dma_buffer(info,
1169 info->tx_buf,info->tx_count);
1171 tx_start(info);
1174 spin_unlock_irqrestore(&info->lock,flags);
1181 SLMP_INFO *info = tty->driver_data;
1186 __FILE__,__LINE__, info->device_name );
1188 if (sanity_check(info, tty->name, "flush_buffer"))
1191 spin_lock_irqsave(&info->lock,flags);
1192 info->tx_count = info->tx_put = info->tx_get = 0;
1193 del_timer(&info->tx_timer);
1194 spin_unlock_irqrestore(&info->lock,flags);
1203 SLMP_INFO *info = tty->driver_data;
1206 if (sanity_check(info, tty->name, "tx_hold"))
1211 __FILE__,__LINE__,info->device_name);
1213 spin_lock_irqsave(&info->lock,flags);
1214 if (info->tx_enabled)
1215 tx_stop(info);
1216 spin_unlock_irqrestore(&info->lock,flags);
1223 SLMP_INFO *info = tty->driver_data;
1226 if (sanity_check(info, tty->name, "tx_release"))
1231 __FILE__,__LINE__,info->device_name);
1233 spin_lock_irqsave(&info->lock,flags);
1234 if (!info->tx_enabled)
1235 tx_start(info);
1236 spin_unlock_irqrestore(&info->lock,flags);
1252 SLMP_INFO *info = tty->driver_data;
1257 info->device_name, cmd );
1259 if (sanity_check(info, tty->name, "ioctl"))
1269 return get_params(info, argp);
1271 return set_params(info, argp);
1273 return get_txidle(info, argp);
1275 return set_txidle(info, (int)arg);
1277 return tx_enable(info, (int)arg);
1279 return rx_enable(info, (int)arg);
1281 return tx_abort(info);
1283 return get_stats(info, argp);
1285 return wait_mgsl_event(info, argp);
1292 return modem_input_wait(info,(int)arg);
1309 SLMP_INFO *info = tty->driver_data;
1313 spin_lock_irqsave(&info->lock,flags);
1314 cnow = info->icount;
1315 spin_unlock_irqrestore(&info->lock,flags);
1336 static inline void line_info(struct seq_file *m, SLMP_INFO *info)
1343 info->device_name,
1344 info->phys_sca_base,
1345 info->phys_memory_base,
1346 info->phys_statctrl_base,
1347 info->phys_lcr_base,
1348 info->irq_level,
1349 info->max_frame_size );
1352 spin_lock_irqsave(&info->lock,flags);
1353 get_signals(info);
1354 spin_unlock_irqrestore(&info->lock,flags);
1358 if (info->serial_signals & SerialSignal_RTS)
1360 if (info->serial_signals & SerialSignal_CTS)
1362 if (info->serial_signals & SerialSignal_DTR)
1364 if (info->serial_signals & SerialSignal_DSR)
1366 if (info->serial_signals & SerialSignal_DCD)
1368 if (info->serial_signals & SerialSignal_RI)
1371 if (info->params.mode == MGSL_MODE_HDLC) {
1373 info->icount.txok, info->icount.rxok);
1374 if (info->icount.txunder)
1375 seq_printf(m, " txunder:%d", info->icount.txunder);
1376 if (info->icount.txabort)
1377 seq_printf(m, " txabort:%d", info->icount.txabort);
1378 if (info->icount.rxshort)
1379 seq_printf(m, " rxshort:%d", info->icount.rxshort);
1380 if (info->icount.rxlong)
1381 seq_printf(m, " rxlong:%d", info->icount.rxlong);
1382 if (info->icount.rxover)
1383 seq_printf(m, " rxover:%d", info->icount.rxover);
1384 if (info->icount.rxcrc)
1385 seq_printf(m, " rxlong:%d", info->icount.rxcrc);
1388 info->icount.tx, info->icount.rx);
1389 if (info->icount.frame)
1390 seq_printf(m, " fe:%d", info->icount.frame);
1391 if (info->icount.parity)
1392 seq_printf(m, " pe:%d", info->icount.parity);
1393 if (info->icount.brk)
1394 seq_printf(m, " brk:%d", info->icount.brk);
1395 if (info->icount.overrun)
1396 seq_printf(m, " oe:%d", info->icount.overrun);
1403 info->tx_active,info->bh_requested,info->bh_running,
1404 info->pending_bh);
1411 SLMP_INFO *info;
1415 info = synclinkmp_device_list;
1416 while( info ) {
1417 line_info(m, info);
1418 info = info->next_device;
1427 SLMP_INFO *info = tty->driver_data;
1429 if (sanity_check(info, tty->name, "chars_in_buffer"))
1434 __FILE__, __LINE__, info->device_name, info->tx_count);
1436 return info->tx_count;
1443 SLMP_INFO *info = tty->driver_data;
1448 __FILE__,__LINE__, info->device_name );
1450 if (sanity_check(info, tty->name, "throttle"))
1457 spin_lock_irqsave(&info->lock,flags);
1458 info->serial_signals &= ~SerialSignal_RTS;
1459 set_signals(info);
1460 spin_unlock_irqrestore(&info->lock,flags);
1468 SLMP_INFO *info = tty->driver_data;
1473 __FILE__,__LINE__, info->device_name );
1475 if (sanity_check(info, tty->name, "unthrottle"))
1479 if (info->x_char)
1480 info->x_char = 0;
1486 spin_lock_irqsave(&info->lock,flags);
1487 info->serial_signals |= SerialSignal_RTS;
1488 set_signals(info);
1489 spin_unlock_irqrestore(&info->lock,flags);
1499 SLMP_INFO * info = tty->driver_data;
1504 __FILE__,__LINE__, info->device_name, break_state);
1506 if (sanity_check(info, tty->name, "set_break"))
1509 spin_lock_irqsave(&info->lock,flags);
1510 RegValue = read_reg(info, CTL);
1515 write_reg(info, CTL, RegValue);
1516 spin_unlock_irqrestore(&info->lock,flags);
1535 SLMP_INFO *info = dev_to_port(dev);
1540 if (info->port.count)
1561 info->params.encoding = new_encoding;
1562 info->params.crc_type = new_crctype;
1565 if (info->netcount)
1566 program_hw(info);
1579 SLMP_INFO *info = dev_to_port(dev);
1589 info->tx_count = skb->len;
1590 tx_load_dma_buffer(info, skb->data, skb->len);
1603 spin_lock_irqsave(&info->lock,flags);
1604 if (!info->tx_active)
1605 tx_start(info);
1606 spin_unlock_irqrestore(&info->lock,flags);
1621 SLMP_INFO *info = dev_to_port(dev);
1634 spin_lock_irqsave(&info->netlock, flags);
1635 if (info->port.count != 0 || info->netcount != 0) {
1637 spin_unlock_irqrestore(&info->netlock, flags);
1640 info->netcount=1;
1641 spin_unlock_irqrestore(&info->netlock, flags);
1644 if ((rc = startup(info)) != 0) {
1645 spin_lock_irqsave(&info->netlock, flags);
1646 info->netcount=0;
1647 spin_unlock_irqrestore(&info->netlock, flags);
1652 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
1653 program_hw(info);
1660 spin_lock_irqsave(&info->lock, flags);
1661 get_signals(info);
1662 spin_unlock_irqrestore(&info->lock, flags);
1663 if (info->serial_signals & SerialSignal_DCD)
1680 SLMP_INFO *info = dev_to_port(dev);
1689 shutdown(info);
1693 spin_lock_irqsave(&info->netlock, flags);
1694 info->netcount=0;
1695 spin_unlock_irqrestore(&info->netlock, flags);
1713 SLMP_INFO *info = dev_to_port(dev);
1720 if (info->port.count)
1735 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1749 new_line.clock_rate = info->params.clock_speed;
1750 new_line.loopback = info->params.loopback ? 1:0;
1769 case CLOCK_DEFAULT: flags = info->params.flags &
1780 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1784 info->params.flags |= flags;
1786 info->params.loopback = new_line.loopback;
1789 info->params.clock_speed = new_line.clock_rate;
1791 info->params.clock_speed = 0;
1794 if (info->netcount)
1795 program_hw(info);
1809 SLMP_INFO *info = dev_to_port(dev);
1818 spin_lock_irqsave(&info->lock,flags);
1819 tx_stop(info);
1820 spin_unlock_irqrestore(&info->lock,flags);
1827 * @info: pointer to device instance information
1831 static void hdlcdev_tx_done(SLMP_INFO *info)
1833 if (netif_queue_stopped(info->netdev))
1834 netif_wake_queue(info->netdev);
1839 * @info: pointer to device instance information
1845 static void hdlcdev_rx(SLMP_INFO *info, char *buf, int size)
1848 struct net_device *dev = info->netdev;
1880 * @info: pointer to device instance information
1886 static int hdlcdev_init(SLMP_INFO *info)
1894 dev = alloc_hdlcdev(info);
1901 dev->mem_start = info->phys_sca_base;
1902 dev->mem_end = info->phys_sca_base + SCA_BASE_SIZE - 1;
1903 dev->irq = info->irq_level;
1923 info->netdev = dev;
1929 * @info: pointer to device instance information
1933 static void hdlcdev_exit(SLMP_INFO *info)
1935 unregister_hdlc_device(info->netdev);
1936 free_netdev(info->netdev);
1937 info->netdev = NULL;
1946 static int bh_action(SLMP_INFO *info)
1951 spin_lock_irqsave(&info->lock,flags);
1953 if (info->pending_bh & BH_RECEIVE) {
1954 info->pending_bh &= ~BH_RECEIVE;
1956 } else if (info->pending_bh & BH_TRANSMIT) {
1957 info->pending_bh &= ~BH_TRANSMIT;
1959 } else if (info->pending_bh & BH_STATUS) {
1960 info->pending_bh &= ~BH_STATUS;
1966 info->bh_running = false;
1967 info->bh_requested = false;
1970 spin_unlock_irqrestore(&info->lock,flags);
1979 SLMP_INFO *info = container_of(work, SLMP_INFO, task);
1984 __FILE__,__LINE__,info->device_name);
1986 info->bh_running = true;
1988 while((action = bh_action(info)) != 0) {
1993 __FILE__,__LINE__,info->device_name, action);
1998 bh_receive(info);
2001 bh_transmit(info);
2004 bh_status(info);
2009 __FILE__,__LINE__,info->device_name,action);
2016 __FILE__,__LINE__,info->device_name);
2019 static void bh_receive(SLMP_INFO *info)
2023 __FILE__,__LINE__,info->device_name);
2025 while( rx_get_frame(info) );
2028 static void bh_transmit(SLMP_INFO *info)
2030 struct tty_struct *tty = info->port.tty;
2034 __FILE__,__LINE__,info->device_name);
2040 static void bh_status(SLMP_INFO *info)
2044 __FILE__,__LINE__,info->device_name);
2046 info->ri_chkcount = 0;
2047 info->dsr_chkcount = 0;
2048 info->dcd_chkcount = 0;
2049 info->cts_chkcount = 0;
2052 static void isr_timer(SLMP_INFO * info)
2054 unsigned char timer = (info->port_num & 1) ? TIMER2 : TIMER0;
2057 write_reg(info, IER2, 0);
2069 write_reg(info, (unsigned char)(timer + TMCS), 0);
2071 info->irq_occurred = true;
2075 __FILE__,__LINE__,info->device_name);
2078 static void isr_rxint(SLMP_INFO * info)
2080 struct tty_struct *tty = info->port.tty;
2081 struct mgsl_icount *icount = &info->icount;
2082 unsigned char status = read_reg(info, SR1) & info->ie1_value & (FLGD + IDLD + CDCD + BRKD);
2083 unsigned char status2 = read_reg(info, SR2) & info->ie2_value & OVRN;
2087 write_reg(info, SR1, status);
2090 write_reg(info, SR2, status2);
2094 __FILE__,__LINE__,info->device_name,status,status2);
2096 if (info->params.mode == MGSL_MODE_ASYNC) {
2103 if (!(status & info->ignore_status_mask1)) {
2104 if (info->read_status_mask1 & BRKD) {
2105 tty_insert_flip_char(&info->port, 0, TTY_BREAK);
2106 if (tty && (info->port.flags & ASYNC_SAK))
2115 info->icount.exithunt++;
2117 info->icount.rxidle++;
2118 wake_up_interruptible(&info->event_wait_q);
2126 get_signals( info );
2127 isr_io_pin(info,
2128 MISCSTATUS_DCD_LATCHED|(info->serial_signals&SerialSignal_DCD));
2135 static void isr_rxrdy(SLMP_INFO * info)
2139 struct mgsl_icount *icount = &info->icount;
2143 __FILE__,__LINE__,info->device_name);
2145 while((status = read_reg(info,CST0)) & BIT0)
2149 DataByte = read_reg(info,TRB);
2155 __FILE__,__LINE__,info->device_name,status);
2166 if (status & info->ignore_status_mask2)
2169 status &= info->read_status_mask2;
2184 tty_insert_flip_char(&info->port, DataByte, flag);
2186 tty_insert_flip_char(&info->port, 0, TTY_OVERRUN);
2191 __FILE__,__LINE__,info->device_name,
2196 tty_flip_buffer_push(&info->port);
2199 static void isr_txeom(SLMP_INFO * info, unsigned char status)
2203 __FILE__,__LINE__,info->device_name,status);
2205 write_reg(info, TXDMA + DIR, 0x00); /* disable Tx DMA IRQs */
2206 write_reg(info, TXDMA + DSR, 0xc0); /* clear IRQs and disable DMA */
2207 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
2210 write_reg(info, CMD, TXRESET);
2211 write_reg(info, CMD, TXENABLE);
2213 write_reg(info, CMD, TXBUFCLR);
2216 info->ie0_value &= ~TXRDYE;
2217 info->ie1_value &= ~(IDLE + UDRN);
2218 write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));
2219 write_reg(info, SR1, (unsigned char)(UDRN + IDLE));
2221 if ( info->tx_active ) {
2222 if (info->params.mode != MGSL_MODE_ASYNC) {
2224 info->icount.txunder++;
2226 info->icount.txok++;
2229 info->tx_active = false;
2230 info->tx_count = info->tx_put = info->tx_get = 0;
2232 del_timer(&info->tx_timer);
2234 if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done ) {
2235 info->serial_signals &= ~SerialSignal_RTS;
2236 info->drop_rts_on_tx_done = false;
2237 set_signals(info);
2241 if (info->netcount)
2242 hdlcdev_tx_done(info);
2246 if (info->port.tty && (info->port.tty->stopped || info->port.tty->hw_stopped)) {
2247 tx_stop(info);
2250 info->pending_bh |= BH_TRANSMIT;
2259 static void isr_txint(SLMP_INFO * info)
2261 unsigned char status = read_reg(info, SR1) & info->ie1_value & (UDRN + IDLE + CCTS);
2264 write_reg(info, SR1, status);
2268 __FILE__,__LINE__,info->device_name,status);
2271 isr_txeom(info, status);
2277 get_signals( info );
2278 isr_io_pin(info,
2279 MISCSTATUS_CTS_LATCHED|(info->serial_signals&SerialSignal_CTS));
2287 static void isr_txrdy(SLMP_INFO * info)
2291 __FILE__,__LINE__,info->device_name,info->tx_count);
2293 if (info->params.mode != MGSL_MODE_ASYNC) {
2295 info->ie0_value &= ~TXRDYE;
2296 info->ie1_value |= IDLE;
2297 write_reg16(info, IE0, (unsigned short)((info->ie1_value << 8) + info->ie0_value));
2301 if (info->port.tty && (info->port.tty->stopped || info->port.tty->hw_stopped)) {
2302 tx_stop(info);
2306 if ( info->tx_count )
2307 tx_load_fifo( info );
2309 info->tx_active = false;
2310 info->ie0_value &= ~TXRDYE;
2311 write_reg(info, IE0, info->ie0_value);
2314 if (info->tx_count < WAKEUP_CHARS)
2315 info->pending_bh |= BH_TRANSMIT;
2318 static void isr_rxdmaok(SLMP_INFO * info)
2323 unsigned char status = read_reg(info,RXDMA + DSR) & 0xc0;
2326 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1));
2330 __FILE__,__LINE__,info->device_name,status);
2332 info->pending_bh |= BH_RECEIVE;
2335 static void isr_rxdmaerror(SLMP_INFO * info)
2340 unsigned char status = read_reg(info,RXDMA + DSR) & 0x30;
2343 write_reg(info, RXDMA + DSR, (unsigned char)(status | 1));
2347 __FILE__,__LINE__,info->device_name,status);
2349 info->rx_overflow = true;
2350 info->pending_bh |= BH_RECEIVE;
2353 static void isr_txdmaok(SLMP_INFO * info)
2355 unsigned char status_reg1 = read_reg(info, SR1);
2357 write_reg(info, TXDMA + DIR, 0x00); /* disable Tx DMA IRQs */
2358 write_reg(info, TXDMA + DSR, 0xc0); /* clear IRQs and disable DMA */
2359 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
2363 __FILE__,__LINE__,info->device_name,status_reg1);
2366 write_reg16(info, TRC0, 0);
2367 info->ie0_value |= TXRDYE;
2368 write_reg(info, IE0, info->ie0_value);
2371 static void isr_txdmaerror(SLMP_INFO * info)
2376 unsigned char status = read_reg(info,TXDMA + DSR) & 0x30;
2379 write_reg(info, TXDMA + DSR, (unsigned char)(status | 1));
2383 __FILE__,__LINE__,info->device_name,status);
2388 static void isr_io_pin( SLMP_INFO *info, u16 status )
2398 icount = &info->icount;
2403 info->input_signal_events.ri_up++;
2405 info->input_signal_events.ri_down++;
2410 info->input_signal_events.dsr_up++;
2412 info->input_signal_events.dsr_down++;
2415 if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) {
2416 info->ie1_value &= ~CDCD;
2417 write_reg(info, IE1, info->ie1_value);
2421 info->input_signal_events.dcd_up++;
2423 info->input_signal_events.dcd_down++;
2425 if (info->netcount) {
2427 netif_carrier_on(info->netdev);
2429 netif_carrier_off(info->netdev);
2435 if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT) {
2436 info->ie1_value &= ~CCTS;
2437 write_reg(info, IE1, info->ie1_value);
2441 info->input_signal_events.cts_up++;
2443 info->input_signal_events.cts_down++;
2445 wake_up_interruptible(&info->status_event_wait_q);
2446 wake_up_interruptible(&info->event_wait_q);
2448 if (tty_port_check_carrier(&info->port) &&
2451 printk("%s CD now %s...", info->device_name,
2454 wake_up_interruptible(&info->port.open_wait);
2458 if (info->port.tty)
2459 tty_hangup(info->port.tty);
2463 if (tty_port_cts_enabled(&info->port) &&
2465 if ( info->port.tty ) {
2466 if (info->port.tty->hw_stopped) {
2470 info->port.tty->hw_stopped = 0;
2471 tx_start(info);
2472 info->pending_bh |= BH_TRANSMIT;
2479 info->port.tty->hw_stopped = 1;
2480 tx_stop(info);
2487 info->pending_bh |= BH_STATUS;
2499 SLMP_INFO *info = dev_id;
2509 __FILE__, __LINE__, info->irq_level);
2511 spin_lock(&info->lock);
2516 tmp = read_reg16(info, ISR0); /* get ISR0 and ISR1 in one read */
2519 timerstatus0 = read_reg(info, ISR2);
2523 __FILE__, __LINE__, info->device_name,
2526 if (info->port_count == 4) {
2528 tmp = read_reg16(info->port_array[2], ISR0);
2531 timerstatus1 = read_reg(info->port_array[2], ISR2);
2535 __FILE__,__LINE__,info->device_name,
2543 for(i=0; i < info->port_count ; i++) {
2544 if (info->port_array[i] == NULL)
2557 isr_rxrdy(info->port_array[i]);
2559 isr_txrdy(info->port_array[i]);
2561 isr_rxint(info->port_array[i]);
2563 isr_txint(info->port_array[i]);
2566 isr_rxdmaerror(info->port_array[i]);
2568 isr_rxdmaok(info->port_array[i]);
2570 isr_txdmaerror(info->port_array[i]);
2572 isr_txdmaok(info->port_array[i]);
2576 isr_timer(info->port_array[0]);
2578 isr_timer(info->port_array[1]);
2580 isr_timer(info->port_array[2]);
2582 isr_timer(info->port_array[3]);
2585 for(i=0; i < info->port_count ; i++) {
2586 SLMP_INFO * port = info->port_array[i];
2606 spin_unlock(&info->lock);
2610 __FILE__, __LINE__, info->irq_level);
2616 static int startup(SLMP_INFO * info)
2619 printk("%s(%d):%s tx_releaseup()\n",__FILE__,__LINE__,info->device_name);
2621 if (tty_port_initialized(&info->port))
2624 if (!info->tx_buf) {
2625 info->tx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
2626 if (!info->tx_buf) {
2628 __FILE__,__LINE__,info->device_name);
2633 info->pending_bh = 0;
2635 memset(&info->icount, 0, sizeof(info->icount));
2638 reset_port(info);
2640 change_params(info);
2642 mod_timer(&info->status_timer, jiffies + msecs_to_jiffies(10));
2644 if (info->port.tty)
2645 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2647 tty_port_set_initialized(&info->port, 1);
2654 static void shutdown(SLMP_INFO * info)
2658 if (!tty_port_initialized(&info->port))
2663 __FILE__,__LINE__, info->device_name );
2667 wake_up_interruptible(&info->status_event_wait_q);
2668 wake_up_interruptible(&info->event_wait_q);
2670 del_timer(&info->tx_timer);
2671 del_timer(&info->status_timer);
2673 kfree(info->tx_buf);
2674 info->tx_buf = NULL;
2676 spin_lock_irqsave(&info->lock,flags);
2678 reset_port(info);
2680 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) {
2681 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2682 set_signals(info);
2685 spin_unlock_irqrestore(&info->lock,flags);
2687 if (info->port.tty)
2688 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2690 tty_port_set_initialized(&info->port, 0);
2693 static void program_hw(SLMP_INFO *info)
2697 spin_lock_irqsave(&info->lock,flags);
2699 rx_stop(info);
2700 tx_stop(info);
2702 info->tx_count = info->tx_put = info->tx_get = 0;
2704 if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
2705 hdlc_mode(info);
2707 async_mode(info);
2709 set_signals(info);
2711 info->dcd_chkcount = 0;
2712 info->cts_chkcount = 0;
2713 info->ri_chkcount = 0;
2714 info->dsr_chkcount = 0;
2716 info->ie1_value |= (CDCD|CCTS);
2717 write_reg(info, IE1, info->ie1_value);
2719 get_signals(info);
2721 if (info->netcount || (info->port.tty && info->port.tty->termios.c_cflag & CREAD) )
2722 rx_start(info);
2724 spin_unlock_irqrestore(&info->lock,flags);
2729 static void change_params(SLMP_INFO *info)
2734 if (!info->port.tty)
2739 __FILE__,__LINE__, info->device_name );
2741 cflag = info->port.tty->termios.c_cflag;
2746 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
2748 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2753 case CS5: info->params.data_bits = 5; break;
2754 case CS6: info->params.data_bits = 6; break;
2755 case CS7: info->params.data_bits = 7; break;
2756 case CS8: info->params.data_bits = 8; break;
2758 default: info->params.data_bits = 7; break;
2762 info->params.stop_bits = 2;
2764 info->params.stop_bits = 1;
2766 info->params.parity = ASYNC_PARITY_NONE;
2769 info->params.parity = ASYNC_PARITY_ODD;
2771 info->params.parity = ASYNC_PARITY_EVEN;
2774 info->params.parity = ASYNC_PARITY_SPACE;
2781 bits_per_char = info->params.data_bits +
2782 info->params.stop_bits + 1;
2788 if (info->params.data_rate <= 460800) {
2789 info->params.data_rate = tty_get_baud_rate(info->port.tty);
2792 if ( info->params.data_rate ) {
2793 info->timeout = (32*HZ*bits_per_char) /
2794 info->params.data_rate;
2796 info->timeout += HZ/50; /* Add .02 seconds of slop */
2798 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
2799 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
2803 info->read_status_mask2 = OVRN;
2804 if (I_INPCK(info->port.tty))
2805 info->read_status_mask2 |= PE | FRME;
2806 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
2807 info->read_status_mask1 |= BRKD;
2808 if (I_IGNPAR(info->port.tty))
2809 info->ignore_status_mask2 |= PE | FRME;
2810 if (I_IGNBRK(info->port.tty)) {
2811 info->ignore_status_mask1 |= BRKD;
2815 if (I_IGNPAR(info->port.tty))
2816 info->ignore_status_mask2 |= OVRN;
2819 program_hw(info);
2822 static int get_stats(SLMP_INFO * info, struct mgsl_icount __user *user_icount)
2828 __FILE__,__LINE__, info->device_name);
2831 memset(&info->icount, 0, sizeof(info->icount));
2833 mutex_lock(&info->port.mutex);
2834 COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
2835 mutex_unlock(&info->port.mutex);
2843 static int get_params(SLMP_INFO * info, MGSL_PARAMS __user *user_params)
2848 __FILE__,__LINE__, info->device_name);
2850 mutex_lock(&info->port.mutex);
2851 COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
2852 mutex_unlock(&info->port.mutex);
2856 __FILE__,__LINE__,info->device_name);
2863 static int set_params(SLMP_INFO * info, MGSL_PARAMS __user *new_params)
2871 __FILE__,__LINE__,info->device_name );
2876 __FILE__,__LINE__,info->device_name);
2880 mutex_lock(&info->port.mutex);
2881 spin_lock_irqsave(&info->lock,flags);
2882 memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
2883 spin_unlock_irqrestore(&info->lock,flags);
2885 change_params(info);
2886 mutex_unlock(&info->port.mutex);
2891 static int get_txidle(SLMP_INFO * info, int __user *idle_mode)
2897 __FILE__,__LINE__, info->device_name, info->idle_mode);
2899 COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
2903 __FILE__,__LINE__,info->device_name);
2910 static int set_txidle(SLMP_INFO * info, int idle_mode)
2916 __FILE__,__LINE__,info->device_name, idle_mode );
2918 spin_lock_irqsave(&info->lock,flags);
2919 info->idle_mode = idle_mode;
2920 tx_set_idle( info );
2921 spin_unlock_irqrestore(&info->lock,flags);
2925 static int tx_enable(SLMP_INFO * info, int enable)
2931 __FILE__,__LINE__,info->device_name, enable);
2933 spin_lock_irqsave(&info->lock,flags);
2935 if ( !info->tx_enabled ) {
2936 tx_start(info);
2939 if ( info->tx_enabled )
2940 tx_stop(info);
2942 spin_unlock_irqrestore(&info->lock,flags);
2948 static int tx_abort(SLMP_INFO * info)
2954 __FILE__,__LINE__,info->device_name);
2956 spin_lock_irqsave(&info->lock,flags);
2957 if ( info->tx_active && info->params.mode == MGSL_MODE_HDLC ) {
2958 info->ie1_value &= ~UDRN;
2959 info->ie1_value |= IDLE;
2960 write_reg(info, IE1, info->ie1_value); /* disable tx status interrupts */
2961 write_reg(info, SR1, (unsigned char)(IDLE + UDRN)); /* clear pending */
2963 write_reg(info, TXDMA + DSR, 0); /* disable DMA channel */
2964 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
2966 write_reg(info, CMD, TXABORT);
2968 spin_unlock_irqrestore(&info->lock,flags);
2972 static int rx_enable(SLMP_INFO * info, int enable)
2978 __FILE__,__LINE__,info->device_name,enable);
2980 spin_lock_irqsave(&info->lock,flags);
2982 if ( !info->rx_enabled )
2983 rx_start(info);
2985 if ( info->rx_enabled )
2986 rx_stop(info);
2988 spin_unlock_irqrestore(&info->lock,flags);
2994 static int wait_mgsl_event(SLMP_INFO * info, int __user *mask_ptr)
3012 __FILE__,__LINE__,info->device_name,mask);
3014 spin_lock_irqsave(&info->lock,flags);
3017 get_signals(info);
3018 s = info->serial_signals;
3026 spin_unlock_irqrestore(&info->lock,flags);
3031 cprev = info->icount;
3032 oldsigs = info->input_signal_events;
3036 unsigned char oldval = info->ie1_value;
3041 info->ie1_value = newval;
3042 write_reg(info, IE1, info->ie1_value);
3047 add_wait_queue(&info->event_wait_q, &wait);
3049 spin_unlock_irqrestore(&info->lock,flags);
3059 spin_lock_irqsave(&info->lock,flags);
3060 cnow = info->icount;
3061 newsigs = info->input_signal_events;
3063 spin_unlock_irqrestore(&info->lock,flags);
3098 remove_wait_queue(&info->event_wait_q, &wait);
3103 spin_lock_irqsave(&info->lock,flags);
3104 if (!waitqueue_active(&info->event_wait_q)) {
3106 info->ie1_value &= ~(FLGD|IDLD);
3107 write_reg(info, IE1, info->ie1_value);
3109 spin_unlock_irqrestore(&info->lock,flags);
3118 static int modem_input_wait(SLMP_INFO *info,int arg)
3126 spin_lock_irqsave(&info->lock,flags);
3127 cprev = info->icount;
3128 add_wait_queue(&info->status_event_wait_q, &wait);
3130 spin_unlock_irqrestore(&info->lock,flags);
3140 spin_lock_irqsave(&info->lock,flags);
3141 cnow = info->icount;
3143 spin_unlock_irqrestore(&info->lock,flags);
3163 remove_wait_queue(&info->status_event_wait_q, &wait);
3172 SLMP_INFO *info = tty->driver_data;
3176 spin_lock_irqsave(&info->lock,flags);
3177 get_signals(info);
3178 spin_unlock_irqrestore(&info->lock,flags);
3180 result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS : 0) |
3181 ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR : 0) |
3182 ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR : 0) |
3183 ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG : 0) |
3184 ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR : 0) |
3185 ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS : 0);
3189 __FILE__,__LINE__, info->device_name, result );
3198 SLMP_INFO *info = tty->driver_data;
3203 __FILE__,__LINE__,info->device_name, set, clear);
3206 info->serial_signals |= SerialSignal_RTS;
3208 info->serial_signals |= SerialSignal_DTR;
3210 info->serial_signals &= ~SerialSignal_RTS;
3212 info->serial_signals &= ~SerialSignal_DTR;
3214 spin_lock_irqsave(&info->lock,flags);
3215 set_signals(info);
3216 spin_unlock_irqrestore(&info->lock,flags);
3223 SLMP_INFO *info = container_of(port, SLMP_INFO, port);
3226 spin_lock_irqsave(&info->lock,flags);
3227 get_signals(info);
3228 spin_unlock_irqrestore(&info->lock,flags);
3230 return (info->serial_signals & SerialSignal_DCD) ? 1 : 0;
3235 SLMP_INFO *info = container_of(port, SLMP_INFO, port);
3238 spin_lock_irqsave(&info->lock,flags);
3240 info->serial_signals |= SerialSignal_RTS | SerialSignal_DTR;
3242 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3243 set_signals(info);
3244 spin_unlock_irqrestore(&info->lock,flags);
3250 SLMP_INFO *info)
3257 struct tty_port *port = &info->port;
3287 spin_lock_irqsave(&info->lock, flags);
3289 spin_unlock_irqrestore(&info->lock, flags);
3338 static int alloc_dma_bufs(SLMP_INFO *info)
3348 info->port_array[0]->last_mem_alloc = (SCA_MEM_SIZE/4) * info->port_num;
3355 BuffersPerFrame = (unsigned short)(info->max_frame_size/SCABUFSIZE);
3356 if ( info->max_frame_size % SCABUFSIZE )
3370 info->tx_buf_count = BuffersPerFrame + 1;
3373 if (info->tx_buf_count > (BufferCount/2))
3374 info->tx_buf_count = BufferCount/2;
3376 if (info->tx_buf_count > SCAMAXDESC)
3377 info->tx_buf_count = SCAMAXDESC;
3380 info->rx_buf_count = BufferCount - info->tx_buf_count;
3382 if (info->rx_buf_count > SCAMAXDESC)
3383 info->rx_buf_count = SCAMAXDESC;
3387 __FILE__,__LINE__, info->device_name,
3388 info->tx_buf_count,info->rx_buf_count);
3390 if ( alloc_buf_list( info ) < 0 ||
3391 alloc_frame_bufs(info,
3392 info->rx_buf_list,
3393 info->rx_buf_list_ex,
3394 info->rx_buf_count) < 0 ||
3395 alloc_frame_bufs(info,
3396 info->tx_buf_list,
3397 info->tx_buf_list_ex,
3398 info->tx_buf_count) < 0 ||
3399 alloc_tmp_rx_buf(info) < 0 ) {
3401 __FILE__,__LINE__, info->device_name);
3405 rx_reset_buffers( info );
3412 static int alloc_buf_list(SLMP_INFO *info)
3417 info->buffer_list = info->memory_base + info->port_array[0]->last_mem_alloc;
3418 info->buffer_list_phys = info->port_array[0]->last_mem_alloc;
3419 info->port_array[0]->last_mem_alloc += BUFFERLISTSIZE;
3421 memset(info->buffer_list, 0, BUFFERLISTSIZE);
3426 info->rx_buf_list = (SCADESC *)info->buffer_list;
3428 info->tx_buf_list = (SCADESC *)info->buffer_list;
3429 info->tx_buf_list += info->rx_buf_count;
3437 for ( i = 0; i < info->rx_buf_count; i++ ) {
3439 info->rx_buf_list_ex[i].phys_entry =
3440 info->buffer_list_phys + (i * SCABUFSIZE);
3444 info->rx_buf_list[i].next = info->buffer_list_phys;
3445 if ( i < info->rx_buf_count - 1 )
3446 info->rx_buf_list[i].next += (i + 1) * sizeof(SCADESC);
3448 info->rx_buf_list[i].length = SCABUFSIZE;
3451 for ( i = 0; i < info->tx_buf_count; i++ ) {
3453 info->tx_buf_list_ex[i].phys_entry = info->buffer_list_phys +
3454 ((info->rx_buf_count + i) * sizeof(SCADESC));
3459 info->tx_buf_list[i].next = info->buffer_list_phys +
3460 info->rx_buf_count * sizeof(SCADESC);
3462 if ( i < info->tx_buf_count - 1 )
3463 info->tx_buf_list[i].next += (i + 1) * sizeof(SCADESC);
3471 static int alloc_frame_bufs(SLMP_INFO *info, SCADESC *buf_list,SCADESC_EX *buf_list_ex,int count)
3477 buf_list_ex[i].virt_addr = info->memory_base + info->port_array[0]->last_mem_alloc;
3478 phys_addr = info->port_array[0]->last_mem_alloc;
3479 info->port_array[0]->last_mem_alloc += SCABUFSIZE;
3488 static void free_dma_bufs(SLMP_INFO *info)
3490 info->buffer_list = NULL;
3491 info->rx_buf_list = NULL;
3492 info->tx_buf_list = NULL;
3498 static int alloc_tmp_rx_buf(SLMP_INFO *info)
3500 info->tmp_rx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
3501 if (info->tmp_rx_buf == NULL)
3504 info->flag_buf = kzalloc(info->max_frame_size, GFP_KERNEL);
3505 if (!info->flag_buf) {
3506 kfree(info->tmp_rx_buf);
3507 info->tmp_rx_buf = NULL;
3513 static void free_tmp_rx_buf(SLMP_INFO *info)
3515 kfree(info->tmp_rx_buf);
3516 info->tmp_rx_buf = NULL;
3517 kfree(info->flag_buf);
3518 info->flag_buf = NULL;
3521 static int claim_resources(SLMP_INFO *info)
3523 if (request_mem_region(info->phys_memory_base,SCA_MEM_SIZE,"synclinkmp") == NULL) {
3525 __FILE__,__LINE__,info->device_name, info->phys_memory_base);
3526 info->init_error = DiagStatus_AddressConflict;
3530 info->shared_mem_requested = true;
3532 if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclinkmp") == NULL) {
3534 __FILE__,__LINE__,info->device_name, info->phys_lcr_base);
3535 info->init_error = DiagStatus_AddressConflict;
3539 info->lcr_mem_requested = true;
3541 if (request_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE,"synclinkmp") == NULL) {
3543 __FILE__,__LINE__,info->device_name, info->phys_sca_base);
3544 info->init_error = DiagStatus_AddressConflict;
3548 info->sca_base_requested = true;
3550 if (request_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE,"synclinkmp") == NULL) {
3552 __FILE__,__LINE__,info->device_name, info->phys_statctrl_base);
3553 info->init_error = DiagStatus_AddressConflict;
3557 info->sca_statctrl_requested = true;
3559 info->memory_base = ioremap(info->phys_memory_base,
3561 if (!info->memory_base) {
3563 __FILE__,__LINE__,info->device_name, info->phys_memory_base );
3564 info->init_error = DiagStatus_CantAssignPciResources;
3568 info->lcr_base = ioremap(info->phys_lcr_base, PAGE_SIZE);
3569 if (!info->lcr_base) {
3571 __FILE__,__LINE__,info->device_name, info->phys_lcr_base );
3572 info->init_error = DiagStatus_CantAssignPciResources;
3575 info->lcr_base += info->lcr_offset;
3577 info->sca_base = ioremap(info->phys_sca_base, PAGE_SIZE);
3578 if (!info->sca_base) {
3580 __FILE__,__LINE__,info->device_name, info->phys_sca_base );
3581 info->init_error = DiagStatus_CantAssignPciResources;
3584 info->sca_base += info->sca_offset;
3586 info->statctrl_base = ioremap(info->phys_statctrl_base,
3588 if (!info->statctrl_base) {
3590 __FILE__,__LINE__,info->device_name, info->phys_statctrl_base );
3591 info->init_error = DiagStatus_CantAssignPciResources;
3594 info->statctrl_base += info->statctrl_offset;
3596 if ( !memory_test(info) ) {
3598 __FILE__,__LINE__,info->device_name, info->phys_memory_base );
3599 info->init_error = DiagStatus_MemoryError;
3606 release_resources( info );
3610 static void release_resources(SLMP_INFO *info)
3614 __FILE__,__LINE__,info->device_name );
3616 if ( info->irq_requested ) {
3617 free_irq(info->irq_level, info);
3618 info->irq_requested = false;
3621 if ( info->shared_mem_requested ) {
3622 release_mem_region(info->phys_memory_base,SCA_MEM_SIZE);
3623 info->shared_mem_requested = false;
3625 if ( info->lcr_mem_requested ) {
3626 release_mem_region(info->phys_lcr_base + info->lcr_offset,128);
3627 info->lcr_mem_requested = false;
3629 if ( info->sca_base_requested ) {
3630 release_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE);
3631 info->sca_base_requested = false;
3633 if ( info->sca_statctrl_requested ) {
3634 release_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE);
3635 info->sca_statctrl_requested = false;
3638 if (info->memory_base){
3639 iounmap(info->memory_base);
3640 info->memory_base = NULL;
3643 if (info->sca_base) {
3644 iounmap(info->sca_base - info->sca_offset);
3645 info->sca_base=NULL;
3648 if (info->statctrl_base) {
3649 iounmap(info->statctrl_base - info->statctrl_offset);
3650 info->statctrl_base=NULL;
3653 if (info->lcr_base){
3654 iounmap(info->lcr_base - info->lcr_offset);
3655 info->lcr_base = NULL;
3660 __FILE__,__LINE__,info->device_name );
3666 static int add_device(SLMP_INFO *info)
3668 info->next_device = NULL;
3669 info->line = synclinkmp_device_count;
3670 sprintf(info->device_name,"ttySLM%dp%d",info->adapter_num,info->port_num);
3672 if (info->line < MAX_DEVICES) {
3673 if (maxframe[info->line])
3674 info->max_frame_size = maxframe[info->line];
3680 synclinkmp_device_list = info;
3685 current_dev->next_device = info;
3688 if ( info->max_frame_size < 4096 )
3689 info->max_frame_size = 4096;
3690 else if ( info->max_frame_size > 65535 )
3691 info->max_frame_size = 65535;
3695 info->device_name,
3696 info->phys_sca_base,
3697 info->phys_memory_base,
3698 info->phys_statctrl_base,
3699 info->phys_lcr_base,
3700 info->irq_level,
3701 info->max_frame_size );
3704 return hdlcdev_init(info);
3721 SLMP_INFO *info;
3723 info = kzalloc(sizeof(SLMP_INFO),
3726 if (!info) {
3730 tty_port_init(&info->port);
3731 info->port.ops = &port_ops;
3732 info->magic = MGSL_MAGIC;
3733 INIT_WORK(&info->task, bh_handler);
3734 info->max_frame_size = 4096;
3735 info->port.close_delay = 5*HZ/10;
3736 info->port.closing_wait = 30*HZ;
3737 init_waitqueue_head(&info->status_event_wait_q);
3738 init_waitqueue_head(&info->event_wait_q);
3739 spin_lock_init(&info->netlock);
3740 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
3741 info->idle_mode = HDLC_TXIDLE_FLAGS;
3742 info->adapter_num = adapter_num;
3743 info->port_num = port_num;
3745 /* Copy configuration info to device instance data */
3746 info->irq_level = pdev->irq;
3747 info->phys_lcr_base = pci_resource_start(pdev,0);
3748 info->phys_sca_base = pci_resource_start(pdev,2);
3749 info->phys_memory_base = pci_resource_start(pdev,3);
3750 info->phys_statctrl_base = pci_resource_start(pdev,4);
3756 info->lcr_offset = info->phys_lcr_base & (PAGE_SIZE-1);
3757 info->phys_lcr_base &= ~(PAGE_SIZE-1);
3759 info->sca_offset = info->phys_sca_base & (PAGE_SIZE-1);
3760 info->phys_sca_base &= ~(PAGE_SIZE-1);
3762 info->statctrl_offset = info->phys_statctrl_base & (PAGE_SIZE-1);
3763 info->phys_statctrl_base &= ~(PAGE_SIZE-1);
3765 info->bus_type = MGSL_BUS_TYPE_PCI;
3766 info->irq_flags = IRQF_SHARED;
3768 timer_setup(&info->tx_timer, tx_timeout, 0);
3769 timer_setup(&info->status_timer, status_timeout, 0);
3780 info->misc_ctrl_value = 0x087e4546;
3788 info->init_error = -1;
3791 return info;
3892 SLMP_INFO *info;
3906 info = synclinkmp_device_list;
3907 while(info) {
3908 reset_port(info);
3909 info = info->next_device;
3913 info = synclinkmp_device_list;
3914 while(info) {
3916 hdlcdev_exit(info);
3918 free_dma_bufs(info);
3919 free_tmp_rx_buf(info);
3920 if ( info->port_num == 0 ) {
3921 if (info->sca_base)
3922 write_reg(info, LPR, 1); /* set low power mode */
3923 release_resources(info);
3925 tmp = info;
3926 info = info->next_device;
4005 static void enable_loopback(SLMP_INFO *info, int enable)
4011 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0)));
4014 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4015 write_control_reg(info);
4022 write_reg(info, RXS, 0x40);
4023 write_reg(info, TXS, 0x40);
4029 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) & ~(BIT1 + BIT0)));
4036 write_reg(info, RXS, 0x00);
4037 write_reg(info, TXS, 0x00);
4041 if (info->params.clock_speed)
4042 set_rate(info, info->params.clock_speed);
4044 set_rate(info, 3686400);
4052 static void set_rate( SLMP_INFO *info, u32 data_rate )
4083 write_reg(info, TXS,
4084 (unsigned char)((read_reg(info, TXS) & 0xf0) | BRValue));
4085 write_reg(info, RXS,
4086 (unsigned char)((read_reg(info, RXS) & 0xf0) | BRValue));
4087 write_reg(info, TMC, (unsigned char)TMCValue);
4090 write_reg(info, TXS,0);
4091 write_reg(info, RXS,0);
4092 write_reg(info, TMC, 0);
4098 static void rx_stop(SLMP_INFO *info)
4102 __FILE__,__LINE__, info->device_name );
4104 write_reg(info, CMD, RXRESET);
4106 info->ie0_value &= ~RXRDYE;
4107 write_reg(info, IE0, info->ie0_value); /* disable Rx data interrupts */
4109 write_reg(info, RXDMA + DSR, 0); /* disable Rx DMA */
4110 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */
4111 write_reg(info, RXDMA + DIR, 0); /* disable Rx DMA interrupts */
4113 info->rx_enabled = false;
4114 info->rx_overflow = false;
4119 static void rx_start(SLMP_INFO *info)
4125 __FILE__,__LINE__, info->device_name );
4127 write_reg(info, CMD, RXRESET);
4129 if ( info->params.mode == MGSL_MODE_HDLC ) {
4131 info->ie0_value &= ~RXRDYE;
4132 write_reg(info, IE0, info->ie0_value);
4135 write_reg(info, RXDMA + DSR, 0); /* disable Rx DMA */
4136 write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */
4138 for (i = 0; i < info->rx_buf_count; i++) {
4139 info->rx_buf_list[i].status = 0xff;
4144 read_status_reg(info);
4146 info->current_rx_buf = 0;
4149 write_reg16(info, RXDMA + CDA,
4150 info->rx_buf_list_ex[0].phys_entry);
4153 write_reg16(info, RXDMA + EDA,
4154 info->rx_buf_list_ex[info->rx_buf_count - 1].phys_entry);
4157 write_reg16(info, RXDMA + BFL, SCABUFSIZE);
4159 write_reg(info, RXDMA + DIR, 0x60); /* enable Rx DMA interrupts (EOM/BOF) */
4160 write_reg(info, RXDMA + DSR, 0xf2); /* clear Rx DMA IRQs, enable Rx DMA */
4163 info->ie0_value |= RXRDYE;
4164 write_reg(info, IE0, info->ie0_value);
4167 write_reg(info, CMD, RXENABLE);
4169 info->rx_overflow = false;
4170 info->rx_enabled = true;
4176 static void tx_start(SLMP_INFO *info)
4180 __FILE__,__LINE__, info->device_name,info->tx_count );
4182 if (!info->tx_enabled ) {
4183 write_reg(info, CMD, TXRESET);
4184 write_reg(info, CMD, TXENABLE);
4185 info->tx_enabled = true;
4188 if ( info->tx_count ) {
4194 info->drop_rts_on_tx_done = false;
4196 if (info->params.mode != MGSL_MODE_ASYNC) {
4198 if ( info->params.flags & HDLC_FLAG_AUTO_RTS ) {
4199 get_signals( info );
4200 if ( !(info->serial_signals & SerialSignal_RTS) ) {
4201 info->serial_signals |= SerialSignal_RTS;
4202 set_signals( info );
4203 info->drop_rts_on_tx_done = true;
4207 write_reg16(info, TRC0,
4210 write_reg(info, TXDMA + DSR, 0); /* disable DMA channel */
4211 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
4214 write_reg16(info, TXDMA + CDA,
4215 info->tx_buf_list_ex[0].phys_entry);
4218 write_reg16(info, TXDMA + EDA,
4219 info->tx_buf_list_ex[info->last_tx_buf].phys_entry);
4222 info->ie1_value &= ~IDLE;
4223 info->ie1_value |= UDRN;
4224 write_reg(info, IE1, info->ie1_value);
4225 write_reg(info, SR1, (unsigned char)(IDLE + UDRN));
4227 write_reg(info, TXDMA + DIR, 0x40); /* enable Tx DMA interrupts (EOM) */
4228 write_reg(info, TXDMA + DSR, 0xf2); /* clear Tx DMA IRQs, enable Tx DMA */
4230 mod_timer(&info->tx_timer, jiffies +
4234 tx_load_fifo(info);
4236 info->ie0_value |= TXRDYE;
4237 write_reg(info, IE0, info->ie0_value);
4240 info->tx_active = true;
4246 static void tx_stop( SLMP_INFO *info )
4250 __FILE__,__LINE__, info->device_name );
4252 del_timer(&info->tx_timer);
4254 write_reg(info, TXDMA + DSR, 0); /* disable DMA channel */
4255 write_reg(info, TXDMA + DCMD, SWABORT); /* reset/init DMA channel */
4257 write_reg(info, CMD, TXRESET);
4259 info->ie1_value &= ~(UDRN + IDLE);
4260 write_reg(info, IE1, info->ie1_value); /* disable tx status interrupts */
4261 write_reg(info, SR1, (unsigned char)(IDLE + UDRN)); /* clear pending */
4263 info->ie0_value &= ~TXRDYE;
4264 write_reg(info, IE0, info->ie0_value); /* disable tx data interrupts */
4266 info->tx_enabled = false;
4267 info->tx_active = false;
4273 static void tx_load_fifo(SLMP_INFO *info)
4279 if ( !info->tx_count && !info->x_char )
4284 while( info->tx_count && (read_reg(info,SR0) & BIT1) ) {
4289 if ( (info->tx_count > 1) && !info->x_char ) {
4291 TwoBytes[0] = info->tx_buf[info->tx_get++];
4292 if (info->tx_get >= info->max_frame_size)
4293 info->tx_get -= info->max_frame_size;
4294 TwoBytes[1] = info->tx_buf[info->tx_get++];
4295 if (info->tx_get >= info->max_frame_size)
4296 info->tx_get -= info->max_frame_size;
4298 write_reg16(info, TRB, *((u16 *)TwoBytes));
4300 info->tx_count -= 2;
4301 info->icount.tx += 2;
4305 if (info->x_char) {
4307 write_reg(info, TRB, info->x_char);
4308 info->x_char = 0;
4310 write_reg(info, TRB, info->tx_buf[info->tx_get++]);
4311 if (info->tx_get >= info->max_frame_size)
4312 info->tx_get -= info->max_frame_size;
4313 info->tx_count--;
4315 info->icount.tx++;
4322 static void reset_port(SLMP_INFO *info)
4324 if (info->sca_base) {
4326 tx_stop(info);
4327 rx_stop(info);
4329 info->serial_signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
4330 set_signals(info);
4333 info->ie0_value = 0;
4334 info->ie1_value = 0;
4335 info->ie2_value = 0;
4336 write_reg(info, IE0, info->ie0_value);
4337 write_reg(info, IE1, info->ie1_value);
4338 write_reg(info, IE2, info->ie2_value);
4340 write_reg(info, CMD, CHRESET);
4346 static void reset_adapter(SLMP_INFO *info)
4351 if (info->port_array[i])
4352 reset_port(info->port_array[i]);
4358 static void async_mode(SLMP_INFO *info)
4363 tx_stop(info);
4364 rx_stop(info);
4377 if (info->params.stop_bits != 1)
4379 write_reg(info, MD0, RegValue);
4391 switch (info->params.data_bits) {
4396 if (info->params.parity != ASYNC_PARITY_NONE) {
4398 if (info->params.parity == ASYNC_PARITY_ODD)
4401 write_reg(info, MD1, RegValue);
4411 if (info->params.loopback)
4413 write_reg(info, MD2, RegValue);
4422 write_reg(info, RXS, RegValue);
4431 write_reg(info, TXS, RegValue);
4437 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4438 write_control_reg(info);
4440 tx_set_idle(info);
4447 write_reg(info, RRC, 0x00);
4454 write_reg(info, TRC0, 0x10);
4461 write_reg(info, TRC1, 0x1e);
4476 if (!(info->serial_signals & SerialSignal_RTS))
4478 write_reg(info, CTL, RegValue);
4481 info->ie0_value |= TXINTE + RXINTE;
4482 write_reg(info, IE0, info->ie0_value);
4485 info->ie1_value = BRKD;
4486 write_reg(info, IE1, info->ie1_value);
4489 info->ie2_value = OVRN;
4490 write_reg(info, IE2, info->ie2_value);
4492 set_rate( info, info->params.data_rate * 16 );
4497 static void hdlc_mode(SLMP_INFO *info)
4506 info->params.flags &= ~(HDLC_FLAG_TXC_DPLL + HDLC_FLAG_RXC_DPLL);
4509 write_reg(info, TXDMA + DIR, 0);
4510 write_reg(info, RXDMA + DIR, 0);
4524 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4526 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4528 if (info->params.crc_type == HDLC_CRC_16_CCITT)
4530 write_reg(info, MD0, RegValue);
4542 write_reg(info, MD1, RegValue);
4555 switch(info->params.encoding) {
4566 if ( info->params.flags & HDLC_FLAG_DPLL_DIV16 ) {
4569 } else if ( info->params.flags & HDLC_FLAG_DPLL_DIV8 ) {
4575 write_reg(info, MD2, RegValue);
4585 if (info->params.flags & HDLC_FLAG_RXC_BRG)
4587 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4589 write_reg(info, RXS, RegValue);
4598 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4600 if (info->params.flags & HDLC_FLAG_TXC_DPLL)
4602 write_reg(info, TXS, RegValue);
4604 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4605 set_rate(info, info->params.clock_speed * DpllDivisor);
4607 set_rate(info, info->params.clock_speed);
4613 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4614 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2));
4616 info->port_array[0]->ctrlreg_value &= ~(BIT0 << (info->port_num * 2));
4617 write_control_reg(info);
4624 write_reg(info, RRC, rx_active_fifo_level);
4631 write_reg(info, TRC0, tx_active_fifo_level);
4638 write_reg(info, TRC1, (unsigned char)(tx_negate_fifo_level - 1));
4651 write_reg(info, TXDMA + DMR, 0x14);
4652 write_reg(info, RXDMA + DMR, 0x14);
4655 write_reg(info, RXDMA + CPB,
4656 (unsigned char)(info->buffer_list_phys >> 16));
4659 write_reg(info, TXDMA + CPB,
4660 (unsigned char)(info->buffer_list_phys >> 16));
4665 info->ie0_value |= TXINTE + RXINTE;
4666 write_reg(info, IE0, info->ie0_value);
4681 if (!(info->serial_signals & SerialSignal_RTS))
4683 write_reg(info, CTL, RegValue);
4687 tx_set_idle(info);
4688 tx_stop(info);
4689 rx_stop(info);
4691 set_rate(info, info->params.clock_speed);
4693 if (info->params.loopback)
4694 enable_loopback(info,1);
4699 static void tx_set_idle(SLMP_INFO *info)
4704 switch(info->idle_mode) {
4714 write_reg(info, IDL, RegValue);
4719 static void get_signals(SLMP_INFO *info)
4721 u16 status = read_reg(info, SR3);
4722 u16 gpstatus = read_status_reg(info);
4726 info->serial_signals &= SerialSignal_RTS | SerialSignal_DTR;
4731 info->serial_signals |= SerialSignal_CTS;
4734 info->serial_signals |= SerialSignal_DCD;
4736 testbit = BIT1 << (info->port_num * 2); // Port 0..3 RI is GPDATA<1,3,5,7>
4738 info->serial_signals |= SerialSignal_RI;
4740 testbit = BIT0 << (info->port_num * 2); // Port 0..3 DSR is GPDATA<0,2,4,6>
4742 info->serial_signals |= SerialSignal_DSR;
4748 static void set_signals(SLMP_INFO *info)
4753 RegValue = read_reg(info, CTL);
4754 if (info->serial_signals & SerialSignal_RTS)
4758 write_reg(info, CTL, RegValue);
4761 EnableBit = BIT1 << (info->port_num*2);
4762 if (info->serial_signals & SerialSignal_DTR)
4763 info->port_array[0]->ctrlreg_value &= ~EnableBit;
4765 info->port_array[0]->ctrlreg_value |= EnableBit;
4766 write_control_reg(info);
4777 static void rx_reset_buffers(SLMP_INFO *info)
4779 rx_free_frame_buffers(info, 0, info->rx_buf_count - 1);
4784 * info pointer to device instance data
4788 static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last)
4794 info->rx_buf_list[first].status = 0xff;
4799 write_reg16(info, RXDMA + EDA, info->rx_buf_list_ex[first].phys_entry);
4803 if (first == info->rx_buf_count)
4808 info->current_rx_buf = first;
4816 static bool rx_get_frame(SLMP_INFO *info)
4823 struct tty_struct *tty = info->port.tty;
4839 StartIndex = EndIndex = info->current_rx_buf;
4842 desc = &info->rx_buf_list[EndIndex];
4843 desc_ex = &info->rx_buf_list_ex[EndIndex];
4848 if (framesize == 0 && info->params.addr_filter != 0xff)
4858 if (EndIndex == info->rx_buf_count)
4861 if (EndIndex == info->current_rx_buf) {
4864 if ( info->rx_enabled ){
4865 spin_lock_irqsave(&info->lock,flags);
4866 rx_start(info);
4867 spin_unlock_irqrestore(&info->lock,flags);
4890 if (info->params.crc_type == HDLC_CRC_NONE)
4894 (addr_field != 0xff && addr_field != info->params.addr_filter)) {
4898 rx_free_frame_buffers(info, StartIndex, EndIndex);
4910 info->icount.rxshort++;
4912 info->icount.rxabort++;
4914 info->icount.rxover++;
4916 info->icount.rxcrc++;
4921 info->netdev->stats.rx_errors++;
4922 info->netdev->stats.rx_frame_errors++;
4929 __FILE__,__LINE__,info->device_name,status,framesize);
4932 trace_block(info,info->rx_buf_list_ex[StartIndex].virt_addr,
4936 if (framesize > info->max_frame_size)
4937 info->icount.rxlong++;
4942 unsigned char *ptmp = info->tmp_rx_buf;
4943 info->tmp_rx_buf_count = framesize;
4945 info->icount.rxok++;
4950 info->rx_buf_list_ex[index].virt_addr,
4955 if ( ++index == info->rx_buf_count )
4960 if (info->netcount)
4961 hdlcdev_rx(info,info->tmp_rx_buf,framesize);
4964 ldisc_receive_buf(tty,info->tmp_rx_buf,
4965 info->flag_buf, framesize);
4969 rx_free_frame_buffers( info, StartIndex, EndIndex );
4974 if ( info->rx_enabled && info->rx_overflow ) {
4978 if (info->rx_buf_list[EndIndex].status == 0xff) {
4979 spin_lock_irqsave(&info->lock,flags);
4980 rx_start(info);
4981 spin_unlock_irqrestore(&info->lock,flags);
4990 static void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count)
4998 trace_block(info, buf, min_t(unsigned int, count, SCABUFSIZE), 1);
5007 desc = &info->tx_buf_list[i];
5008 desc_ex = &info->tx_buf_list_ex[i];
5010 load_pci_memory(info, desc_ex->virt_addr,buf,copy_count);
5022 if (i >= info->tx_buf_count)
5026 info->tx_buf_list[i].status = 0x81; /* set EOM and EOT status */
5027 info->last_tx_buf = ++i;
5030 static bool register_test(SLMP_INFO *info)
5038 spin_lock_irqsave(&info->lock,flags);
5039 reset_port(info);
5042 info->init_error = DiagStatus_AddressFailure;
5048 write_reg(info, TMC, testval[i]);
5049 write_reg(info, IDL, testval[(i+1)%count]);
5050 write_reg(info, SA0, testval[(i+2)%count]);
5051 write_reg(info, SA1, testval[(i+3)%count]);
5053 if ( (read_reg(info, TMC) != testval[i]) ||
5054 (read_reg(info, IDL) != testval[(i+1)%count]) ||
5055 (read_reg(info, SA0) != testval[(i+2)%count]) ||
5056 (read_reg(info, SA1) != testval[(i+3)%count]) )
5063 reset_port(info);
5064 spin_unlock_irqrestore(&info->lock,flags);
5069 static bool irq_test(SLMP_INFO *info)
5074 unsigned char timer = (info->port_num & 1) ? TIMER2 : TIMER0;
5076 spin_lock_irqsave(&info->lock,flags);
5077 reset_port(info);
5080 info->init_error = DiagStatus_IrqFailure;
5081 info->irq_occurred = false;
5086 write_reg(info, IER2, (unsigned char)((info->port_num & 1) ? BIT6 : BIT4));
5088 write_reg(info, (unsigned char)(timer + TEPR), 0); /* timer expand prescale */
5089 write_reg16(info, (unsigned char)(timer + TCONR), 1); /* timer constant */
5102 write_reg(info, (unsigned char)(timer + TMCS), 0x50);
5104 spin_unlock_irqrestore(&info->lock,flags);
5107 while( timeout-- && !info->irq_occurred ) {
5111 spin_lock_irqsave(&info->lock,flags);
5112 reset_port(info);
5113 spin_unlock_irqrestore(&info->lock,flags);
5115 return info->irq_occurred;
5120 static bool sca_init(SLMP_INFO *info)
5123 write_reg(info, PABR0, 0); /* wait controller addr boundary 0 */
5124 write_reg(info, PABR1, 0); /* wait controller addr boundary 1 */
5125 write_reg(info, WCRL, 0); /* wait controller low range */
5126 write_reg(info, WCRM, 0); /* wait controller mid range */
5127 write_reg(info, WCRH, 0); /* wait controller high range */
5138 write_reg(info, DPCR, dma_priority);
5141 write_reg(info, DMER, 0x80);
5144 write_reg(info, IER0, 0xff); /* TxRDY,RxRDY,TxINT,RxINT (ports 0-1) */
5145 write_reg(info, IER1, 0xff); /* DMIB,DMIA (channels 0-3) */
5146 write_reg(info, IER2, 0xf0); /* TIRQ (timers 0-3) */
5154 write_reg(info, ITCR, 0);
5161 static bool init_adapter(SLMP_INFO *info)
5166 volatile u32 *MiscCtrl = (u32 *)(info->lcr_base + 0x50);
5169 info->misc_ctrl_value |= BIT30;
5170 *MiscCtrl = info->misc_ctrl_value;
5180 info->misc_ctrl_value &= ~BIT30;
5181 *MiscCtrl = info->misc_ctrl_value;
5184 info->ctrlreg_value = 0xaa;
5185 write_control_reg(info);
5188 volatile u32 *LCR1BRDR = (u32 *)(info->lcr_base + 0x2c);
5211 sca_init(info->port_array[0]);
5212 sca_init(info->port_array[2]);
5220 static bool loopback_test(SLMP_INFO *info)
5230 struct tty_struct *oldtty = info->port.tty;
5231 u32 speed = info->params.clock_speed;
5233 info->params.clock_speed = 3686400;
5234 info->port.tty = NULL;
5237 info->init_error = DiagStatus_DmaFailure;
5243 memset(info->tmp_rx_buf,0,TESTFRAMESIZE);
5246 spin_lock_irqsave(&info->lock,flags);
5247 hdlc_mode(info);
5248 enable_loopback(info,1);
5249 rx_start(info);
5250 info->tx_count = count;
5251 tx_load_dma_buffer(info,buf,count);
5252 tx_start(info);
5253 spin_unlock_irqrestore(&info->lock,flags);
5260 if (rx_get_frame(info)) {
5268 ( info->tmp_rx_buf_count != count ||
5269 memcmp(buf, info->tmp_rx_buf,count))) {
5273 spin_lock_irqsave(&info->lock,flags);
5274 reset_adapter(info);
5275 spin_unlock_irqrestore(&info->lock,flags);
5277 info->params.clock_speed = speed;
5278 info->port.tty = oldtty;
5285 static int adapter_test( SLMP_INFO *info )
5290 __FILE__,__LINE__,info->device_name );
5292 spin_lock_irqsave(&info->lock,flags);
5293 init_adapter(info);
5294 spin_unlock_irqrestore(&info->lock,flags);
5296 info->port_array[0]->port_count = 0;
5298 if ( register_test(info->port_array[0]) &&
5299 register_test(info->port_array[1])) {
5301 info->port_array[0]->port_count = 2;
5303 if ( register_test(info->port_array[2]) &&
5304 register_test(info->port_array[3]) )
5305 info->port_array[0]->port_count += 2;
5309 __FILE__,__LINE__,info->device_name, (unsigned long)(info->phys_sca_base));
5313 if ( !irq_test(info->port_array[0]) ||
5314 !irq_test(info->port_array[1]) ||
5315 (info->port_count == 4 && !irq_test(info->port_array[2])) ||
5316 (info->port_count == 4 && !irq_test(info->port_array[3]))) {
5318 __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
5322 if (!loopback_test(info->port_array[0]) ||
5323 !loopback_test(info->port_array[1]) ||
5324 (info->port_count == 4 && !loopback_test(info->port_array[2])) ||
5325 (info->port_count == 4 && !loopback_test(info->port_array[3]))) {
5327 __FILE__,__LINE__,info->device_name);
5333 __FILE__,__LINE__,info->device_name );
5335 info->port_array[0]->init_error = 0;
5336 info->port_array[1]->init_error = 0;
5337 if ( info->port_count > 2 ) {
5338 info->port_array[2]->init_error = 0;
5339 info->port_array[3]->init_error = 0;
5347 static bool memory_test(SLMP_INFO *info)
5354 unsigned long * addr = (unsigned long *)info->memory_base;
5372 addr = (unsigned long *)info->memory_base;
5380 memset( info->memory_base, 0, SCA_MEM_SIZE );
5399 static void load_pci_memory(SLMP_INFO *info, char* dest, const char* src, unsigned short count)
5410 read_status_reg(info);
5418 static void trace_block(SLMP_INFO *info,const char* data, int count, int xmit)
5423 printk("%s tx data:\n",info->device_name);
5425 printk("%s rx data:\n",info->device_name);
5455 SLMP_INFO *info = from_timer(info, t, tx_timer);
5460 __FILE__,__LINE__,info->device_name);
5461 if(info->tx_active && info->params.mode == MGSL_MODE_HDLC) {
5462 info->icount.txtimeout++;
5464 spin_lock_irqsave(&info->lock,flags);
5465 info->tx_active = false;
5466 info->tx_count = info->tx_put = info->tx_get = 0;
5468 spin_unlock_irqrestore(&info->lock,flags);
5471 if (info->netcount)
5472 hdlcdev_tx_done(info);
5475 bh_transmit(info);
5483 SLMP_INFO *info = from_timer(info, t, status_timer);
5488 spin_lock_irqsave(&info->lock,flags);
5489 get_signals(info);
5490 spin_unlock_irqrestore(&info->lock,flags);
5494 delta = info->old_signals ^ info->serial_signals;
5495 info->old_signals = info->serial_signals;
5498 status |= MISCSTATUS_DSR_LATCHED|(info->serial_signals&SerialSignal_DSR);
5501 status |= MISCSTATUS_RI_LATCHED|(info->serial_signals&SerialSignal_RI);
5504 status |= MISCSTATUS_DCD_LATCHED|(info->serial_signals&SerialSignal_DCD);
5507 status |= MISCSTATUS_CTS_LATCHED|(info->serial_signals&SerialSignal_CTS);
5510 isr_io_pin(info,status);
5512 mod_timer(&info->status_timer, jiffies + msecs_to_jiffies(10));
5520 unsigned char * RegAddr = (unsigned char*)(info->sca_base + Addr); \
5521 if (info->port_num > 1) \
5523 if ( info->port_num & 1) { \
5531 static unsigned char read_reg(SLMP_INFO * info, unsigned char Addr)
5536 static void write_reg(SLMP_INFO * info, unsigned char Addr, unsigned char Value)
5542 static u16 read_reg16(SLMP_INFO * info, unsigned char Addr)
5548 static void write_reg16(SLMP_INFO * info, unsigned char Addr, u16 Value)
5554 static unsigned char read_status_reg(SLMP_INFO * info)
5556 unsigned char *RegAddr = (unsigned char *)info->statctrl_base;
5560 static void write_control_reg(SLMP_INFO * info)
5562 unsigned char *RegAddr = (unsigned char *)info->statctrl_base;
5563 *RegAddr = info->port_array[0]->ctrlreg_value;