Lines Matching refs:info
41 #define DBGDATA(info, buf, size, label) if (debug_level >= DEBUG_LEVEL_DATA) trace_block((info), (buf), (size), (label))
42 /*#define DBGTBUF(info) dump_tbufs(info)*/
43 /*#define DBGRBUF(info) dump_rbufs(info)*/
400 #define slgt_irq_on(info, mask) \
401 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) | (mask)))
402 #define slgt_irq_off(info, mask) \
403 wr_reg16((info), SCR, (unsigned short)(rd_reg16((info), SCR) & ~(mask)))
405 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr);
406 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value);
407 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr);
408 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value);
409 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr);
410 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value);
412 static void msc_set_vcr(struct slgt_info *info);
414 static int startup(struct slgt_info *info);
415 static int block_til_ready(struct tty_struct *tty, struct file * filp,struct slgt_info *info);
416 static void shutdown(struct slgt_info *info);
417 static void program_hw(struct slgt_info *info);
418 static void change_params(struct slgt_info *info);
420 static int adapter_test(struct slgt_info *info);
422 static void reset_port(struct slgt_info *info);
423 static void async_mode(struct slgt_info *info);
424 static void sync_mode(struct slgt_info *info);
426 static void rx_stop(struct slgt_info *info);
427 static void rx_start(struct slgt_info *info);
428 static void reset_rbufs(struct slgt_info *info);
429 static void free_rbufs(struct slgt_info *info, unsigned int first, unsigned int last);
430 static bool rx_get_frame(struct slgt_info *info);
431 static bool rx_get_buf(struct slgt_info *info);
433 static void tx_start(struct slgt_info *info);
434 static void tx_stop(struct slgt_info *info);
435 static void tx_set_idle(struct slgt_info *info);
436 static unsigned int tbuf_bytes(struct slgt_info *info);
437 static void reset_tbufs(struct slgt_info *info);
438 static void tdma_reset(struct slgt_info *info);
439 static bool tx_load(struct slgt_info *info, const char *buf, unsigned int count);
441 static void get_gtsignals(struct slgt_info *info);
442 static void set_gtsignals(struct slgt_info *info);
443 static void set_rate(struct slgt_info *info, u32 data_rate);
445 static void bh_transmit(struct slgt_info *info);
446 static void isr_txeom(struct slgt_info *info, unsigned short status);
454 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount);
455 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *params);
456 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *params);
457 static int get_txidle(struct slgt_info *info, int __user *idle_mode);
458 static int set_txidle(struct slgt_info *info, int idle_mode);
459 static int tx_enable(struct slgt_info *info, int enable);
460 static int tx_abort(struct slgt_info *info);
461 static int rx_enable(struct slgt_info *info, int enable);
462 static int modem_input_wait(struct slgt_info *info,int arg);
463 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr);
464 static int get_interface(struct slgt_info *info, int __user *if_mode);
465 static int set_interface(struct slgt_info *info, int if_mode);
466 static int set_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
467 static int get_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
468 static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *gpio);
469 static int get_xsync(struct slgt_info *info, int __user *if_mode);
470 static int set_xsync(struct slgt_info *info, int if_mode);
471 static int get_xctrl(struct slgt_info *info, int __user *if_mode);
472 static int set_xctrl(struct slgt_info *info, int if_mode);
477 static void release_resources(struct slgt_info *info);
496 static void trace_block(struct slgt_info *info, const char *data, int count, const char *label)
500 printk("%s %s data:\n",info->device_name, label);
519 #define DBGDATA(info, buf, size, label)
523 static void dump_tbufs(struct slgt_info *info)
526 printk("tbuf_current=%d\n", info->tbuf_current);
527 for (i=0 ; i < info->tbuf_count ; i++) {
529 i, le16_to_cpu(info->tbufs[i].count), le16_to_cpu(info->tbufs[i].status));
533 #define DBGTBUF(info)
537 static void dump_rbufs(struct slgt_info *info)
540 printk("rbuf_current=%d\n", info->rbuf_current);
541 for (i=0 ; i < info->rbuf_count ; i++) {
543 i, le16_to_cpu(info->rbufs[i].count), le16_to_cpu(info->rbufs[i].status));
547 #define DBGRBUF(info)
550 static inline int sanity_check(struct slgt_info *info, char *devname, const char *name)
553 if (!info) {
557 if (info->magic != MGSL_MAGIC) {
562 if (!info)
594 struct slgt_info *info;
604 info = slgt_device_list;
605 while(info && info->line != line)
606 info = info->next_device;
607 if (sanity_check(info, tty->name, "open"))
609 if (info->init_error) {
610 DBGERR(("%s init error=%d\n", info->device_name, info->init_error));
614 tty->driver_data = info;
615 info->port.tty = tty;
617 DBGINFO(("%s open, old ref count = %d\n", info->device_name, info->port.count));
619 mutex_lock(&info->port.mutex);
620 info->port.low_latency = (info->port.flags & ASYNC_LOW_LATENCY) ? 1 : 0;
622 spin_lock_irqsave(&info->netlock, flags);
623 if (info->netcount) {
625 spin_unlock_irqrestore(&info->netlock, flags);
626 mutex_unlock(&info->port.mutex);
629 info->port.count++;
630 spin_unlock_irqrestore(&info->netlock, flags);
632 if (info->port.count == 1) {
634 retval = startup(info);
636 mutex_unlock(&info->port.mutex);
640 mutex_unlock(&info->port.mutex);
641 retval = block_til_ready(tty, filp, info);
643 DBGINFO(("%s block_til_ready rc=%d\n", info->device_name, retval));
652 info->port.tty = NULL; /* tty layer will release tty struct */
653 if(info->port.count)
654 info->port.count--;
657 DBGINFO(("%s open rc=%d\n", info->device_name, retval));
663 struct slgt_info *info = tty->driver_data;
665 if (sanity_check(info, tty->name, "close"))
667 DBGINFO(("%s close entry, count=%d\n", info->device_name, info->port.count));
669 if (tty_port_close_start(&info->port, tty, filp) == 0)
672 mutex_lock(&info->port.mutex);
673 if (tty_port_initialized(&info->port))
674 wait_until_sent(tty, info->timeout);
678 shutdown(info);
679 mutex_unlock(&info->port.mutex);
681 tty_port_close_end(&info->port, tty);
682 info->port.tty = NULL;
684 DBGINFO(("%s close exit, count=%d\n", tty->driver->name, info->port.count));
689 struct slgt_info *info = tty->driver_data;
692 if (sanity_check(info, tty->name, "hangup"))
694 DBGINFO(("%s hangup\n", info->device_name));
698 mutex_lock(&info->port.mutex);
699 shutdown(info);
701 spin_lock_irqsave(&info->port.lock, flags);
702 info->port.count = 0;
703 info->port.tty = NULL;
704 spin_unlock_irqrestore(&info->port.lock, flags);
705 tty_port_set_active(&info->port, 0);
706 mutex_unlock(&info->port.mutex);
708 wake_up_interruptible(&info->port.open_wait);
713 struct slgt_info *info = tty->driver_data;
718 change_params(info);
722 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
723 spin_lock_irqsave(&info->lock,flags);
724 set_gtsignals(info);
725 spin_unlock_irqrestore(&info->lock,flags);
730 info->signals |= SerialSignal_DTR;
732 info->signals |= SerialSignal_RTS;
733 spin_lock_irqsave(&info->lock,flags);
734 set_gtsignals(info);
735 spin_unlock_irqrestore(&info->lock,flags);
745 static void update_tx_timer(struct slgt_info *info)
751 if (info->params.mode == MGSL_MODE_HDLC) {
752 int timeout = (tbuf_bytes(info) * 7) + 1000;
753 mod_timer(&info->tx_timer, jiffies + msecs_to_jiffies(timeout));
761 struct slgt_info *info = tty->driver_data;
764 if (sanity_check(info, tty->name, "write"))
767 DBGINFO(("%s write count=%d\n", info->device_name, count));
769 if (!info->tx_buf || (count > info->max_frame_size))
775 spin_lock_irqsave(&info->lock, flags);
777 if (info->tx_count) {
779 if (!tx_load(info, info->tx_buf, info->tx_count))
781 info->tx_count = 0;
784 if (tx_load(info, buf, count))
788 spin_unlock_irqrestore(&info->lock, flags);
789 DBGINFO(("%s write rc=%d\n", info->device_name, ret));
795 struct slgt_info *info = tty->driver_data;
799 if (sanity_check(info, tty->name, "put_char"))
801 DBGINFO(("%s put_char(%d)\n", info->device_name, ch));
802 if (!info->tx_buf)
804 spin_lock_irqsave(&info->lock,flags);
805 if (info->tx_count < info->max_frame_size) {
806 info->tx_buf[info->tx_count++] = ch;
809 spin_unlock_irqrestore(&info->lock,flags);
815 struct slgt_info *info = tty->driver_data;
818 if (sanity_check(info, tty->name, "send_xchar"))
820 DBGINFO(("%s send_xchar(%d)\n", info->device_name, ch));
821 info->x_char = ch;
823 spin_lock_irqsave(&info->lock,flags);
824 if (!info->tx_enabled)
825 tx_start(info);
826 spin_unlock_irqrestore(&info->lock,flags);
832 struct slgt_info *info = tty->driver_data;
835 if (!info )
837 if (sanity_check(info, tty->name, "wait_until_sent"))
839 DBGINFO(("%s wait_until_sent entry\n", info->device_name));
840 if (!tty_port_initialized(&info->port))
851 if (info->params.data_rate) {
852 char_time = info->timeout/(32 * 5);
861 while (info->tx_active) {
869 DBGINFO(("%s wait_until_sent exit\n", info->device_name));
874 struct slgt_info *info = tty->driver_data;
877 if (sanity_check(info, tty->name, "write_room"))
879 ret = (info->tx_active) ? 0 : HDLC_MAX_FRAME_SIZE;
880 DBGINFO(("%s write_room=%d\n", info->device_name, ret));
886 struct slgt_info *info = tty->driver_data;
889 if (sanity_check(info, tty->name, "flush_chars"))
891 DBGINFO(("%s flush_chars entry tx_count=%d\n", info->device_name, info->tx_count));
893 if (info->tx_count <= 0 || tty->stopped ||
894 tty->hw_stopped || !info->tx_buf)
897 DBGINFO(("%s flush_chars start transmit\n", info->device_name));
899 spin_lock_irqsave(&info->lock,flags);
900 if (info->tx_count && tx_load(info, info->tx_buf, info->tx_count))
901 info->tx_count = 0;
902 spin_unlock_irqrestore(&info->lock,flags);
907 struct slgt_info *info = tty->driver_data;
910 if (sanity_check(info, tty->name, "flush_buffer"))
912 DBGINFO(("%s flush_buffer\n", info->device_name));
914 spin_lock_irqsave(&info->lock, flags);
915 info->tx_count = 0;
916 spin_unlock_irqrestore(&info->lock, flags);
926 struct slgt_info *info = tty->driver_data;
929 if (sanity_check(info, tty->name, "tx_hold"))
931 DBGINFO(("%s tx_hold\n", info->device_name));
932 spin_lock_irqsave(&info->lock,flags);
933 if (info->tx_enabled && info->params.mode == MGSL_MODE_ASYNC)
934 tx_stop(info);
935 spin_unlock_irqrestore(&info->lock,flags);
943 struct slgt_info *info = tty->driver_data;
946 if (sanity_check(info, tty->name, "tx_release"))
948 DBGINFO(("%s tx_release\n", info->device_name));
949 spin_lock_irqsave(&info->lock, flags);
950 if (info->tx_count && tx_load(info, info->tx_buf, info->tx_count))
951 info->tx_count = 0;
952 spin_unlock_irqrestore(&info->lock, flags);
969 struct slgt_info *info = tty->driver_data;
973 if (sanity_check(info, tty->name, "ioctl"))
975 DBGINFO(("%s ioctl() cmd=%08X\n", info->device_name, cmd));
984 return wait_mgsl_event(info, argp);
986 return modem_input_wait(info,(int)arg);
988 return set_gpio(info, argp);
990 return get_gpio(info, argp);
992 return wait_gpio(info, argp);
994 return get_xsync(info, argp);
996 return set_xsync(info, (int)arg);
998 return get_xctrl(info, argp);
1000 return set_xctrl(info, (int)arg);
1002 mutex_lock(&info->port.mutex);
1005 ret = get_params(info, argp);
1008 ret = set_params(info, argp);
1011 ret = get_txidle(info, argp);
1014 ret = set_txidle(info, (int)arg);
1017 ret = tx_enable(info, (int)arg);
1020 ret = rx_enable(info, (int)arg);
1023 ret = tx_abort(info);
1026 ret = get_stats(info, argp);
1029 ret = get_interface(info, argp);
1032 ret = set_interface(info,(int)arg);
1037 mutex_unlock(&info->port.mutex);
1045 struct slgt_info *info = tty->driver_data;
1049 spin_lock_irqsave(&info->lock,flags);
1050 cnow = info->icount;
1051 spin_unlock_irqrestore(&info->lock,flags);
1072 static long get_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *user_params)
1076 DBGINFO(("%s get_params32\n", info->device_name));
1078 tmp_params.mode = (compat_ulong_t)info->params.mode;
1079 tmp_params.loopback = info->params.loopback;
1080 tmp_params.flags = info->params.flags;
1081 tmp_params.encoding = info->params.encoding;
1082 tmp_params.clock_speed = (compat_ulong_t)info->params.clock_speed;
1083 tmp_params.addr_filter = info->params.addr_filter;
1084 tmp_params.crc_type = info->params.crc_type;
1085 tmp_params.preamble_length = info->params.preamble_length;
1086 tmp_params.preamble = info->params.preamble;
1087 tmp_params.data_rate = (compat_ulong_t)info->params.data_rate;
1088 tmp_params.data_bits = info->params.data_bits;
1089 tmp_params.stop_bits = info->params.stop_bits;
1090 tmp_params.parity = info->params.parity;
1096 static long set_params32(struct slgt_info *info, struct MGSL_PARAMS32 __user *new_params)
1100 DBGINFO(("%s set_params32\n", info->device_name));
1104 spin_lock(&info->lock);
1106 info->base_clock = tmp_params.clock_speed;
1108 info->params.mode = tmp_params.mode;
1109 info->params.loopback = tmp_params.loopback;
1110 info->params.flags = tmp_params.flags;
1111 info->params.encoding = tmp_params.encoding;
1112 info->params.clock_speed = tmp_params.clock_speed;
1113 info->params.addr_filter = tmp_params.addr_filter;
1114 info->params.crc_type = tmp_params.crc_type;
1115 info->params.preamble_length = tmp_params.preamble_length;
1116 info->params.preamble = tmp_params.preamble;
1117 info->params.data_rate = tmp_params.data_rate;
1118 info->params.data_bits = tmp_params.data_bits;
1119 info->params.stop_bits = tmp_params.stop_bits;
1120 info->params.parity = tmp_params.parity;
1122 spin_unlock(&info->lock);
1124 program_hw(info);
1132 struct slgt_info *info = tty->driver_data;
1135 if (sanity_check(info, tty->name, "compat_ioctl"))
1137 DBGINFO(("%s compat_ioctl() cmd=%08X\n", info->device_name, cmd));
1141 rc = set_params32(info, compat_ptr(arg));
1145 rc = get_params32(info, compat_ptr(arg));
1164 DBGINFO(("%s compat_ioctl() cmd=%08X rc=%d\n", info->device_name, cmd, rc));
1174 static inline void line_info(struct seq_file *m, struct slgt_info *info)
1180 info->device_name, info->phys_reg_addr,
1181 info->irq_level, info->max_frame_size);
1184 spin_lock_irqsave(&info->lock,flags);
1185 get_gtsignals(info);
1186 spin_unlock_irqrestore(&info->lock,flags);
1190 if (info->signals & SerialSignal_RTS)
1192 if (info->signals & SerialSignal_CTS)
1194 if (info->signals & SerialSignal_DTR)
1196 if (info->signals & SerialSignal_DSR)
1198 if (info->signals & SerialSignal_DCD)
1200 if (info->signals & SerialSignal_RI)
1203 if (info->params.mode != MGSL_MODE_ASYNC) {
1205 info->icount.txok, info->icount.rxok);
1206 if (info->icount.txunder)
1207 seq_printf(m, " txunder:%d", info->icount.txunder);
1208 if (info->icount.txabort)
1209 seq_printf(m, " txabort:%d", info->icount.txabort);
1210 if (info->icount.rxshort)
1211 seq_printf(m, " rxshort:%d", info->icount.rxshort);
1212 if (info->icount.rxlong)
1213 seq_printf(m, " rxlong:%d", info->icount.rxlong);
1214 if (info->icount.rxover)
1215 seq_printf(m, " rxover:%d", info->icount.rxover);
1216 if (info->icount.rxcrc)
1217 seq_printf(m, " rxcrc:%d", info->icount.rxcrc);
1220 info->icount.tx, info->icount.rx);
1221 if (info->icount.frame)
1222 seq_printf(m, " fe:%d", info->icount.frame);
1223 if (info->icount.parity)
1224 seq_printf(m, " pe:%d", info->icount.parity);
1225 if (info->icount.brk)
1226 seq_printf(m, " brk:%d", info->icount.brk);
1227 if (info->icount.overrun)
1228 seq_printf(m, " oe:%d", info->icount.overrun);
1235 info->tx_active,info->bh_requested,info->bh_running,
1236 info->pending_bh);
1243 struct slgt_info *info;
1247 info = slgt_device_list;
1248 while( info ) {
1249 line_info(m, info);
1250 info = info->next_device;
1260 struct slgt_info *info = tty->driver_data;
1262 if (sanity_check(info, tty->name, "chars_in_buffer"))
1264 count = tbuf_bytes(info);
1265 DBGINFO(("%s chars_in_buffer()=%d\n", info->device_name, count));
1274 struct slgt_info *info = tty->driver_data;
1277 if (sanity_check(info, tty->name, "throttle"))
1279 DBGINFO(("%s throttle\n", info->device_name));
1283 spin_lock_irqsave(&info->lock,flags);
1284 info->signals &= ~SerialSignal_RTS;
1285 set_gtsignals(info);
1286 spin_unlock_irqrestore(&info->lock,flags);
1295 struct slgt_info *info = tty->driver_data;
1298 if (sanity_check(info, tty->name, "unthrottle"))
1300 DBGINFO(("%s unthrottle\n", info->device_name));
1302 if (info->x_char)
1303 info->x_char = 0;
1308 spin_lock_irqsave(&info->lock,flags);
1309 info->signals |= SerialSignal_RTS;
1310 set_gtsignals(info);
1311 spin_unlock_irqrestore(&info->lock,flags);
1321 struct slgt_info *info = tty->driver_data;
1325 if (sanity_check(info, tty->name, "set_break"))
1327 DBGINFO(("%s set_break(%d)\n", info->device_name, break_state));
1329 spin_lock_irqsave(&info->lock,flags);
1330 value = rd_reg16(info, TCR);
1335 wr_reg16(info, TCR, value);
1336 spin_unlock_irqrestore(&info->lock,flags);
1355 struct slgt_info *info = dev_to_port(dev);
1360 if (info->port.count)
1363 DBGINFO(("%s hdlcdev_attach\n", info->device_name));
1383 info->params.encoding = new_encoding;
1384 info->params.crc_type = new_crctype;
1387 if (info->netcount)
1388 program_hw(info);
1401 struct slgt_info *info = dev_to_port(dev);
1419 spin_lock_irqsave(&info->lock, flags);
1420 tx_load(info, skb->data, skb->len);
1421 spin_unlock_irqrestore(&info->lock, flags);
1439 struct slgt_info *info = dev_to_port(dev);
1454 spin_lock_irqsave(&info->netlock, flags);
1455 if (info->port.count != 0 || info->netcount != 0) {
1457 spin_unlock_irqrestore(&info->netlock, flags);
1460 info->netcount=1;
1461 spin_unlock_irqrestore(&info->netlock, flags);
1464 if ((rc = startup(info)) != 0) {
1465 spin_lock_irqsave(&info->netlock, flags);
1466 info->netcount=0;
1467 spin_unlock_irqrestore(&info->netlock, flags);
1472 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
1473 program_hw(info);
1480 spin_lock_irqsave(&info->lock, flags);
1481 get_gtsignals(info);
1482 spin_unlock_irqrestore(&info->lock, flags);
1483 if (info->signals & SerialSignal_DCD)
1500 struct slgt_info *info = dev_to_port(dev);
1508 shutdown(info);
1512 spin_lock_irqsave(&info->netlock, flags);
1513 info->netcount=0;
1514 spin_unlock_irqrestore(&info->netlock, flags);
1533 struct slgt_info *info = dev_to_port(dev);
1539 if (info->port.count)
1556 flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1569 new_line.clock_rate = info->params.clock_speed;
1570 new_line.loopback = info->params.loopback ? 1:0;
1589 case CLOCK_DEFAULT: flags = info->params.flags &
1600 info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
1604 info->params.flags |= flags;
1606 info->params.loopback = new_line.loopback;
1609 info->params.clock_speed = new_line.clock_rate;
1611 info->params.clock_speed = 0;
1614 if (info->netcount)
1615 program_hw(info);
1629 struct slgt_info *info = dev_to_port(dev);
1637 spin_lock_irqsave(&info->lock,flags);
1638 tx_stop(info);
1639 spin_unlock_irqrestore(&info->lock,flags);
1646 * @info: pointer to device instance information
1650 static void hdlcdev_tx_done(struct slgt_info *info)
1652 if (netif_queue_stopped(info->netdev))
1653 netif_wake_queue(info->netdev);
1658 * @info: pointer to device instance information
1664 static void hdlcdev_rx(struct slgt_info *info, char *buf, int size)
1667 struct net_device *dev = info->netdev;
1697 * @info: pointer to device instance information
1703 static int hdlcdev_init(struct slgt_info *info)
1711 dev = alloc_hdlcdev(info);
1713 printk(KERN_ERR "%s hdlc device alloc failure\n", info->device_name);
1718 dev->mem_start = info->phys_reg_addr;
1719 dev->mem_end = info->phys_reg_addr + SLGT_REG_SIZE - 1;
1720 dev->irq = info->irq_level;
1740 info->netdev = dev;
1746 * @info: pointer to device instance information
1750 static void hdlcdev_exit(struct slgt_info *info)
1752 if (!info->netdev)
1754 unregister_hdlc_device(info->netdev);
1755 free_netdev(info->netdev);
1756 info->netdev = NULL;
1764 static void rx_async(struct slgt_info *info)
1766 struct mgsl_icount *icount = &info->icount;
1770 struct slgt_desc *bufs = info->rbufs;
1776 start = end = info->rbuf_current;
1779 count = desc_count(bufs[end]) - info->rbuf_index;
1780 p = bufs[end].buf + info->rbuf_index;
1782 DBGISR(("%s rx_async count=%d\n", info->device_name, count));
1783 DBGDATA(info, p, count, "rx");
1798 if (status & info->ignore_status_mask)
1805 tty_insert_flip_char(&info->port, ch, stat);
1811 info->rbuf_index += i;
1812 mod_timer(&info->rx_timer, jiffies + 1);
1816 info->rbuf_index = 0;
1817 free_rbufs(info, end, end);
1819 if (++end == info->rbuf_count)
1828 tty_flip_buffer_push(&info->port);
1834 static int bh_action(struct slgt_info *info)
1839 spin_lock_irqsave(&info->lock,flags);
1841 if (info->pending_bh & BH_RECEIVE) {
1842 info->pending_bh &= ~BH_RECEIVE;
1844 } else if (info->pending_bh & BH_TRANSMIT) {
1845 info->pending_bh &= ~BH_TRANSMIT;
1847 } else if (info->pending_bh & BH_STATUS) {
1848 info->pending_bh &= ~BH_STATUS;
1852 info->bh_running = false;
1853 info->bh_requested = false;
1857 spin_unlock_irqrestore(&info->lock,flags);
1867 struct slgt_info *info = container_of(work, struct slgt_info, task);
1870 info->bh_running = true;
1872 while((action = bh_action(info))) {
1875 DBGBH(("%s bh receive\n", info->device_name));
1876 switch(info->params.mode) {
1878 rx_async(info);
1881 while(rx_get_frame(info));
1887 while(rx_get_buf(info));
1891 if (info->rx_restart)
1892 rx_start(info);
1895 bh_transmit(info);
1898 DBGBH(("%s bh status\n", info->device_name));
1899 info->ri_chkcount = 0;
1900 info->dsr_chkcount = 0;
1901 info->dcd_chkcount = 0;
1902 info->cts_chkcount = 0;
1905 DBGBH(("%s unknown action\n", info->device_name));
1909 DBGBH(("%s bh_handler exit\n", info->device_name));
1912 static void bh_transmit(struct slgt_info *info)
1914 struct tty_struct *tty = info->port.tty;
1916 DBGBH(("%s bh_transmit\n", info->device_name));
1921 static void dsr_change(struct slgt_info *info, unsigned short status)
1924 info->signals |= SerialSignal_DSR;
1925 info->input_signal_events.dsr_up++;
1927 info->signals &= ~SerialSignal_DSR;
1928 info->input_signal_events.dsr_down++;
1930 DBGISR(("dsr_change %s signals=%04X\n", info->device_name, info->signals));
1931 if ((info->dsr_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1932 slgt_irq_off(info, IRQ_DSR);
1935 info->icount.dsr++;
1936 wake_up_interruptible(&info->status_event_wait_q);
1937 wake_up_interruptible(&info->event_wait_q);
1938 info->pending_bh |= BH_STATUS;
1941 static void cts_change(struct slgt_info *info, unsigned short status)
1944 info->signals |= SerialSignal_CTS;
1945 info->input_signal_events.cts_up++;
1947 info->signals &= ~SerialSignal_CTS;
1948 info->input_signal_events.cts_down++;
1950 DBGISR(("cts_change %s signals=%04X\n", info->device_name, info->signals));
1951 if ((info->cts_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1952 slgt_irq_off(info, IRQ_CTS);
1955 info->icount.cts++;
1956 wake_up_interruptible(&info->status_event_wait_q);
1957 wake_up_interruptible(&info->event_wait_q);
1958 info->pending_bh |= BH_STATUS;
1960 if (tty_port_cts_enabled(&info->port)) {
1961 if (info->port.tty) {
1962 if (info->port.tty->hw_stopped) {
1963 if (info->signals & SerialSignal_CTS) {
1964 info->port.tty->hw_stopped = 0;
1965 info->pending_bh |= BH_TRANSMIT;
1969 if (!(info->signals & SerialSignal_CTS))
1970 info->port.tty->hw_stopped = 1;
1976 static void dcd_change(struct slgt_info *info, unsigned short status)
1979 info->signals |= SerialSignal_DCD;
1980 info->input_signal_events.dcd_up++;
1982 info->signals &= ~SerialSignal_DCD;
1983 info->input_signal_events.dcd_down++;
1985 DBGISR(("dcd_change %s signals=%04X\n", info->device_name, info->signals));
1986 if ((info->dcd_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
1987 slgt_irq_off(info, IRQ_DCD);
1990 info->icount.dcd++;
1992 if (info->netcount) {
1993 if (info->signals & SerialSignal_DCD)
1994 netif_carrier_on(info->netdev);
1996 netif_carrier_off(info->netdev);
1999 wake_up_interruptible(&info->status_event_wait_q);
2000 wake_up_interruptible(&info->event_wait_q);
2001 info->pending_bh |= BH_STATUS;
2003 if (tty_port_check_carrier(&info->port)) {
2004 if (info->signals & SerialSignal_DCD)
2005 wake_up_interruptible(&info->port.open_wait);
2007 if (info->port.tty)
2008 tty_hangup(info->port.tty);
2013 static void ri_change(struct slgt_info *info, unsigned short status)
2016 info->signals |= SerialSignal_RI;
2017 info->input_signal_events.ri_up++;
2019 info->signals &= ~SerialSignal_RI;
2020 info->input_signal_events.ri_down++;
2022 DBGISR(("ri_change %s signals=%04X\n", info->device_name, info->signals));
2023 if ((info->ri_chkcount)++ == IO_PIN_SHUTDOWN_LIMIT) {
2024 slgt_irq_off(info, IRQ_RI);
2027 info->icount.rng++;
2028 wake_up_interruptible(&info->status_event_wait_q);
2029 wake_up_interruptible(&info->event_wait_q);
2030 info->pending_bh |= BH_STATUS;
2033 static void isr_rxdata(struct slgt_info *info)
2035 unsigned int count = info->rbuf_fill_count;
2036 unsigned int i = info->rbuf_fill_index;
2039 while (rd_reg16(info, SSR) & IRQ_RXDATA) {
2040 reg = rd_reg16(info, RDR);
2041 DBGISR(("isr_rxdata %s RDR=%04X\n", info->device_name, reg));
2042 if (desc_complete(info->rbufs[i])) {
2044 rx_stop(info);
2045 info->rx_restart = true;
2048 info->rbufs[i].buf[count++] = (unsigned char)reg;
2050 if (info->params.mode == MGSL_MODE_ASYNC)
2051 info->rbufs[i].buf[count++] = (unsigned char)(reg >> 8);
2052 if (count == info->rbuf_fill_level || (reg & BIT10)) {
2054 set_desc_count(info->rbufs[i], count);
2055 set_desc_status(info->rbufs[i], BIT15 | (reg >> 8));
2056 info->rbuf_fill_count = count = 0;
2057 if (++i == info->rbuf_count)
2059 info->pending_bh |= BH_RECEIVE;
2063 info->rbuf_fill_index = i;
2064 info->rbuf_fill_count = count;
2067 static void isr_serial(struct slgt_info *info)
2069 unsigned short status = rd_reg16(info, SSR);
2071 DBGISR(("%s isr_serial status=%04X\n", info->device_name, status));
2073 wr_reg16(info, SSR, status); /* clear pending */
2075 info->irq_occurred = true;
2077 if (info->params.mode == MGSL_MODE_ASYNC) {
2079 if (info->tx_active)
2080 isr_txeom(info, status);
2082 if (info->rx_pio && (status & IRQ_RXDATA))
2083 isr_rxdata(info);
2085 info->icount.brk++;
2087 if (info->port.tty) {
2088 if (!(status & info->ignore_status_mask)) {
2089 if (info->read_status_mask & MASK_BREAK) {
2090 tty_insert_flip_char(&info->port, 0, TTY_BREAK);
2091 if (info->port.flags & ASYNC_SAK)
2092 do_SAK(info->port.tty);
2099 isr_txeom(info, status);
2100 if (info->rx_pio && (status & IRQ_RXDATA))
2101 isr_rxdata(info);
2104 info->icount.rxidle++;
2106 info->icount.exithunt++;
2107 wake_up_interruptible(&info->event_wait_q);
2111 rx_start(info);
2115 dsr_change(info, status);
2117 cts_change(info, status);
2119 dcd_change(info, status);
2121 ri_change(info, status);
2124 static void isr_rdma(struct slgt_info *info)
2126 unsigned int status = rd_reg32(info, RDCSR);
2128 DBGISR(("%s isr_rdma status=%08x\n", info->device_name, status));
2141 wr_reg32(info, RDCSR, status); /* clear pending */
2144 DBGISR(("%s isr_rdma rx_restart=1\n", info->device_name));
2145 info->rx_restart = true;
2147 info->pending_bh |= BH_RECEIVE;
2150 static void isr_tdma(struct slgt_info *info)
2152 unsigned int status = rd_reg32(info, TDCSR);
2154 DBGISR(("%s isr_tdma status=%08x\n", info->device_name, status));
2166 wr_reg32(info, TDCSR, status); /* clear pending */
2171 info->pending_bh |= BH_TRANSMIT;
2178 * if there are unsent buffers then info->tbuf_start
2181 static bool unsent_tbufs(struct slgt_info *info)
2183 unsigned int i = info->tbuf_current;
2195 i = info->tbuf_count - 1;
2196 if (!desc_count(info->tbufs[i]))
2198 info->tbuf_start = i;
2200 } while (i != info->tbuf_current);
2205 static void isr_txeom(struct slgt_info *info, unsigned short status)
2207 DBGISR(("%s txeom status=%04x\n", info->device_name, status));
2209 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
2210 tdma_reset(info);
2212 unsigned short val = rd_reg16(info, TCR);
2213 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
2214 wr_reg16(info, TCR, val); /* clear reset bit */
2217 if (info->tx_active) {
2218 if (info->params.mode != MGSL_MODE_ASYNC) {
2220 info->icount.txunder++;
2222 info->icount.txok++;
2225 if (unsent_tbufs(info)) {
2226 tx_start(info);
2227 update_tx_timer(info);
2230 info->tx_active = false;
2232 del_timer(&info->tx_timer);
2234 if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done) {
2235 info->signals &= ~SerialSignal_RTS;
2236 info->drop_rts_on_tx_done = false;
2237 set_gtsignals(info);
2241 if (info->netcount)
2242 hdlcdev_tx_done(info);
2246 if (info->port.tty && (info->port.tty->stopped || info->port.tty->hw_stopped)) {
2247 tx_stop(info);
2250 info->pending_bh |= BH_TRANSMIT;
2255 static void isr_gpio(struct slgt_info *info, unsigned int changed, unsigned int state)
2260 for (w = info->gpio_wait_q, prev = NULL ; w != NULL ; w = w->next) {
2267 info->gpio_wait_q = w->next;
2280 struct slgt_info *info = dev_id;
2284 DBGISR(("slgt_interrupt irq=%d entry\n", info->irq_level));
2286 while((gsr = rd_reg32(info, GSR) & 0xffffff00)) {
2287 DBGISR(("%s gsr=%08x\n", info->device_name, gsr));
2288 info->irq_occurred = true;
2289 for(i=0; i < info->port_count ; i++) {
2290 if (info->port_array[i] == NULL)
2292 spin_lock(&info->port_array[i]->lock);
2294 isr_serial(info->port_array[i]);
2296 isr_rdma(info->port_array[i]);
2298 isr_tdma(info->port_array[i]);
2299 spin_unlock(&info->port_array[i]->lock);
2303 if (info->gpio_present) {
2306 spin_lock(&info->lock);
2307 while ((changed = rd_reg32(info, IOSR)) != 0) {
2308 DBGISR(("%s iosr=%08x\n", info->device_name, changed));
2310 state = rd_reg32(info, IOVR);
2312 wr_reg32(info, IOSR, changed);
2313 for (i=0 ; i < info->port_count ; i++) {
2314 if (info->port_array[i] != NULL)
2315 isr_gpio(info->port_array[i], changed, state);
2318 spin_unlock(&info->lock);
2321 for(i=0; i < info->port_count ; i++) {
2322 struct slgt_info *port = info->port_array[i];
2336 DBGISR(("slgt_interrupt irq=%d exit\n", info->irq_level));
2340 static int startup(struct slgt_info *info)
2342 DBGINFO(("%s startup\n", info->device_name));
2344 if (tty_port_initialized(&info->port))
2347 if (!info->tx_buf) {
2348 info->tx_buf = kmalloc(info->max_frame_size, GFP_KERNEL);
2349 if (!info->tx_buf) {
2350 DBGERR(("%s can't allocate tx buffer\n", info->device_name));
2355 info->pending_bh = 0;
2357 memset(&info->icount, 0, sizeof(info->icount));
2360 change_params(info);
2362 if (info->port.tty)
2363 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2365 tty_port_set_initialized(&info->port, 1);
2373 static void shutdown(struct slgt_info *info)
2377 if (!tty_port_initialized(&info->port))
2380 DBGINFO(("%s shutdown\n", info->device_name));
2384 wake_up_interruptible(&info->status_event_wait_q);
2385 wake_up_interruptible(&info->event_wait_q);
2387 del_timer_sync(&info->tx_timer);
2388 del_timer_sync(&info->rx_timer);
2390 kfree(info->tx_buf);
2391 info->tx_buf = NULL;
2393 spin_lock_irqsave(&info->lock,flags);
2395 tx_stop(info);
2396 rx_stop(info);
2398 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
2400 if (!info->port.tty || info->port.tty->termios.c_cflag & HUPCL) {
2401 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2402 set_gtsignals(info);
2405 flush_cond_wait(&info->gpio_wait_q);
2407 spin_unlock_irqrestore(&info->lock,flags);
2409 if (info->port.tty)
2410 set_bit(TTY_IO_ERROR, &info->port.tty->flags);
2412 tty_port_set_initialized(&info->port, 0);
2415 static void program_hw(struct slgt_info *info)
2419 spin_lock_irqsave(&info->lock,flags);
2421 rx_stop(info);
2422 tx_stop(info);
2424 if (info->params.mode != MGSL_MODE_ASYNC ||
2425 info->netcount)
2426 sync_mode(info);
2428 async_mode(info);
2430 set_gtsignals(info);
2432 info->dcd_chkcount = 0;
2433 info->cts_chkcount = 0;
2434 info->ri_chkcount = 0;
2435 info->dsr_chkcount = 0;
2437 slgt_irq_on(info, IRQ_DCD | IRQ_CTS | IRQ_DSR | IRQ_RI);
2438 get_gtsignals(info);
2440 if (info->netcount ||
2441 (info->port.tty && info->port.tty->termios.c_cflag & CREAD))
2442 rx_start(info);
2444 spin_unlock_irqrestore(&info->lock,flags);
2450 static void change_params(struct slgt_info *info)
2455 if (!info->port.tty)
2457 DBGINFO(("%s change_params\n", info->device_name));
2459 cflag = info->port.tty->termios.c_cflag;
2464 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
2466 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
2471 case CS5: info->params.data_bits = 5; break;
2472 case CS6: info->params.data_bits = 6; break;
2473 case CS7: info->params.data_bits = 7; break;
2474 case CS8: info->params.data_bits = 8; break;
2475 default: info->params.data_bits = 7; break;
2478 info->params.stop_bits = (cflag & CSTOPB) ? 2 : 1;
2481 info->params.parity = (cflag & PARODD) ? ASYNC_PARITY_ODD : ASYNC_PARITY_EVEN;
2483 info->params.parity = ASYNC_PARITY_NONE;
2488 bits_per_char = info->params.data_bits +
2489 info->params.stop_bits + 1;
2491 info->params.data_rate = tty_get_baud_rate(info->port.tty);
2493 if (info->params.data_rate) {
2494 info->timeout = (32*HZ*bits_per_char) /
2495 info->params.data_rate;
2497 info->timeout += HZ/50; /* Add .02 seconds of slop */
2499 tty_port_set_cts_flow(&info->port, cflag & CRTSCTS);
2500 tty_port_set_check_carrier(&info->port, ~cflag & CLOCAL);
2504 info->read_status_mask = IRQ_RXOVER;
2505 if (I_INPCK(info->port.tty))
2506 info->read_status_mask |= MASK_PARITY | MASK_FRAMING;
2507 if (I_BRKINT(info->port.tty) || I_PARMRK(info->port.tty))
2508 info->read_status_mask |= MASK_BREAK;
2509 if (I_IGNPAR(info->port.tty))
2510 info->ignore_status_mask |= MASK_PARITY | MASK_FRAMING;
2511 if (I_IGNBRK(info->port.tty)) {
2512 info->ignore_status_mask |= MASK_BREAK;
2516 if (I_IGNPAR(info->port.tty))
2517 info->ignore_status_mask |= MASK_OVERRUN;
2520 program_hw(info);
2523 static int get_stats(struct slgt_info *info, struct mgsl_icount __user *user_icount)
2525 DBGINFO(("%s get_stats\n", info->device_name));
2527 memset(&info->icount, 0, sizeof(info->icount));
2529 if (copy_to_user(user_icount, &info->icount, sizeof(struct mgsl_icount)))
2535 static int get_params(struct slgt_info *info, MGSL_PARAMS __user *user_params)
2537 DBGINFO(("%s get_params\n", info->device_name));
2538 if (copy_to_user(user_params, &info->params, sizeof(MGSL_PARAMS)))
2543 static int set_params(struct slgt_info *info, MGSL_PARAMS __user *new_params)
2548 DBGINFO(("%s set_params\n", info->device_name));
2552 spin_lock_irqsave(&info->lock, flags);
2554 info->base_clock = tmp_params.clock_speed;
2556 memcpy(&info->params, &tmp_params, sizeof(MGSL_PARAMS));
2557 spin_unlock_irqrestore(&info->lock, flags);
2559 program_hw(info);
2564 static int get_txidle(struct slgt_info *info, int __user *idle_mode)
2566 DBGINFO(("%s get_txidle=%d\n", info->device_name, info->idle_mode));
2567 if (put_user(info->idle_mode, idle_mode))
2572 static int set_txidle(struct slgt_info *info, int idle_mode)
2575 DBGINFO(("%s set_txidle(%d)\n", info->device_name, idle_mode));
2576 spin_lock_irqsave(&info->lock,flags);
2577 info->idle_mode = idle_mode;
2578 if (info->params.mode != MGSL_MODE_ASYNC)
2579 tx_set_idle(info);
2580 spin_unlock_irqrestore(&info->lock,flags);
2584 static int tx_enable(struct slgt_info *info, int enable)
2587 DBGINFO(("%s tx_enable(%d)\n", info->device_name, enable));
2588 spin_lock_irqsave(&info->lock,flags);
2590 if (!info->tx_enabled)
2591 tx_start(info);
2593 if (info->tx_enabled)
2594 tx_stop(info);
2596 spin_unlock_irqrestore(&info->lock,flags);
2603 static int tx_abort(struct slgt_info *info)
2606 DBGINFO(("%s tx_abort\n", info->device_name));
2607 spin_lock_irqsave(&info->lock,flags);
2608 tdma_reset(info);
2609 spin_unlock_irqrestore(&info->lock,flags);
2613 static int rx_enable(struct slgt_info *info, int enable)
2617 DBGINFO(("%s rx_enable(%08x)\n", info->device_name, enable));
2618 spin_lock_irqsave(&info->lock,flags);
2627 spin_unlock_irqrestore(&info->lock, flags);
2630 info->rbuf_fill_level = rbuf_fill_level;
2632 info->rx_pio = 1; /* PIO mode */
2634 info->rx_pio = 0; /* DMA mode */
2635 rx_stop(info); /* restart receiver to use new fill level */
2646 if (!info->rx_enabled)
2647 rx_start(info);
2650 wr_reg16(info, RCR, rd_reg16(info, RCR) | BIT3);
2653 if (info->rx_enabled)
2654 rx_stop(info);
2656 spin_unlock_irqrestore(&info->lock,flags);
2663 static int wait_mgsl_event(struct slgt_info *info, int __user *mask_ptr)
2677 DBGINFO(("%s wait_mgsl_event(%d)\n", info->device_name, mask));
2679 spin_lock_irqsave(&info->lock,flags);
2682 get_gtsignals(info);
2683 s = info->signals;
2691 spin_unlock_irqrestore(&info->lock,flags);
2696 cprev = info->icount;
2697 oldsigs = info->input_signal_events;
2701 unsigned short val = rd_reg16(info, SCR);
2703 wr_reg16(info, SCR, (unsigned short)(val | IRQ_RXIDLE));
2707 add_wait_queue(&info->event_wait_q, &wait);
2709 spin_unlock_irqrestore(&info->lock,flags);
2719 spin_lock_irqsave(&info->lock,flags);
2720 cnow = info->icount;
2721 newsigs = info->input_signal_events;
2723 spin_unlock_irqrestore(&info->lock,flags);
2758 remove_wait_queue(&info->event_wait_q, &wait);
2763 spin_lock_irqsave(&info->lock,flags);
2764 if (!waitqueue_active(&info->event_wait_q)) {
2766 wr_reg16(info, SCR,
2767 (unsigned short)(rd_reg16(info, SCR) & ~IRQ_RXIDLE));
2769 spin_unlock_irqrestore(&info->lock,flags);
2777 static int get_interface(struct slgt_info *info, int __user *if_mode)
2779 DBGINFO(("%s get_interface=%x\n", info->device_name, info->if_mode));
2780 if (put_user(info->if_mode, if_mode))
2785 static int set_interface(struct slgt_info *info, int if_mode)
2790 DBGINFO(("%s set_interface=%x)\n", info->device_name, if_mode));
2791 spin_lock_irqsave(&info->lock,flags);
2792 info->if_mode = if_mode;
2794 msc_set_vcr(info);
2797 val = rd_reg16(info, TCR);
2798 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
2802 wr_reg16(info, TCR, val);
2804 spin_unlock_irqrestore(&info->lock,flags);
2808 static int get_xsync(struct slgt_info *info, int __user *xsync)
2810 DBGINFO(("%s get_xsync=%x\n", info->device_name, info->xsync));
2811 if (put_user(info->xsync, xsync))
2822 static int set_xsync(struct slgt_info *info, int xsync)
2826 DBGINFO(("%s set_xsync=%x)\n", info->device_name, xsync));
2827 spin_lock_irqsave(&info->lock, flags);
2828 info->xsync = xsync;
2829 wr_reg32(info, XSR, xsync);
2830 spin_unlock_irqrestore(&info->lock, flags);
2834 static int get_xctrl(struct slgt_info *info, int __user *xctrl)
2836 DBGINFO(("%s get_xctrl=%x\n", info->device_name, info->xctrl));
2837 if (put_user(info->xctrl, xctrl))
2859 static int set_xctrl(struct slgt_info *info, int xctrl)
2863 DBGINFO(("%s set_xctrl=%x)\n", info->device_name, xctrl));
2864 spin_lock_irqsave(&info->lock, flags);
2865 info->xctrl = xctrl;
2866 wr_reg32(info, XCR, xctrl);
2867 spin_unlock_irqrestore(&info->lock, flags);
2880 static int set_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2886 if (!info->gpio_present)
2891 info->device_name, gpio.state, gpio.smask,
2894 spin_lock_irqsave(&info->port_array[0]->lock, flags);
2896 data = rd_reg32(info, IODR);
2899 wr_reg32(info, IODR, data);
2902 data = rd_reg32(info, IOVR);
2905 wr_reg32(info, IOVR, data);
2907 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
2915 static int get_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2918 if (!info->gpio_present)
2920 gpio.state = rd_reg32(info, IOVR);
2922 gpio.dir = rd_reg32(info, IODR);
2927 info->device_name, gpio.state, gpio.dir));
2989 static int wait_gpio(struct slgt_info *info, struct gpio_desc __user *user_gpio)
2997 if (!info->gpio_present)
3002 info->device_name, gpio.state, gpio.smask));
3004 if ((gpio.smask &= ~rd_reg32(info, IODR)) == 0)
3008 spin_lock_irqsave(&info->port_array[0]->lock, flags);
3010 wr_reg32(info, IOER, rd_reg32(info, IOER) | gpio.smask);
3012 state = rd_reg32(info, IOVR);
3019 add_cond_wait(&info->gpio_wait_q, &wait);
3020 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
3026 spin_lock_irqsave(&info->port_array[0]->lock, flags);
3027 remove_cond_wait(&info->gpio_wait_q, &wait);
3031 if (info->gpio_wait_q == NULL)
3032 wr_reg32(info, IOER, 0);
3033 spin_unlock_irqrestore(&info->port_array[0]->lock, flags);
3040 static int modem_input_wait(struct slgt_info *info,int arg)
3048 spin_lock_irqsave(&info->lock,flags);
3049 cprev = info->icount;
3050 add_wait_queue(&info->status_event_wait_q, &wait);
3052 spin_unlock_irqrestore(&info->lock,flags);
3062 spin_lock_irqsave(&info->lock,flags);
3063 cnow = info->icount;
3065 spin_unlock_irqrestore(&info->lock,flags);
3085 remove_wait_queue(&info->status_event_wait_q, &wait);
3095 struct slgt_info *info = tty->driver_data;
3099 spin_lock_irqsave(&info->lock,flags);
3100 get_gtsignals(info);
3101 spin_unlock_irqrestore(&info->lock,flags);
3103 result = ((info->signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
3104 ((info->signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
3105 ((info->signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
3106 ((info->signals & SerialSignal_RI) ? TIOCM_RNG:0) +
3107 ((info->signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
3108 ((info->signals & SerialSignal_CTS) ? TIOCM_CTS:0);
3110 DBGINFO(("%s tiocmget value=%08X\n", info->device_name, result));
3124 struct slgt_info *info = tty->driver_data;
3127 DBGINFO(("%s tiocmset(%x,%x)\n", info->device_name, set, clear));
3130 info->signals |= SerialSignal_RTS;
3132 info->signals |= SerialSignal_DTR;
3134 info->signals &= ~SerialSignal_RTS;
3136 info->signals &= ~SerialSignal_DTR;
3138 spin_lock_irqsave(&info->lock,flags);
3139 set_gtsignals(info);
3140 spin_unlock_irqrestore(&info->lock,flags);
3147 struct slgt_info *info = container_of(port, struct slgt_info, port);
3149 spin_lock_irqsave(&info->lock,flags);
3150 get_gtsignals(info);
3151 spin_unlock_irqrestore(&info->lock,flags);
3152 return (info->signals & SerialSignal_DCD) ? 1 : 0;
3158 struct slgt_info *info = container_of(port, struct slgt_info, port);
3160 spin_lock_irqsave(&info->lock,flags);
3162 info->signals |= SerialSignal_RTS | SerialSignal_DTR;
3164 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
3165 set_gtsignals(info);
3166 spin_unlock_irqrestore(&info->lock,flags);
3174 struct slgt_info *info)
3181 struct tty_port *port = &info->port;
3204 spin_lock_irqsave(&info->lock, flags);
3206 spin_unlock_irqrestore(&info->lock, flags);
3256 static int alloc_tmp_rbuf(struct slgt_info *info)
3258 info->tmp_rbuf = kmalloc(info->max_frame_size + 5, GFP_KERNEL);
3259 if (info->tmp_rbuf == NULL)
3262 info->flag_buf = kzalloc(info->max_frame_size + 5, GFP_KERNEL);
3263 if (!info->flag_buf) {
3264 kfree(info->tmp_rbuf);
3265 info->tmp_rbuf = NULL;
3271 static void free_tmp_rbuf(struct slgt_info *info)
3273 kfree(info->tmp_rbuf);
3274 info->tmp_rbuf = NULL;
3275 kfree(info->flag_buf);
3276 info->flag_buf = NULL;
3282 static int alloc_desc(struct slgt_info *info)
3288 info->bufs = dma_alloc_coherent(&info->pdev->dev, DESC_LIST_SIZE,
3289 &info->bufs_dma_addr, GFP_KERNEL);
3290 if (info->bufs == NULL)
3293 info->rbufs = (struct slgt_desc*)info->bufs;
3294 info->tbufs = ((struct slgt_desc*)info->bufs) + info->rbuf_count;
3296 pbufs = (unsigned int)info->bufs_dma_addr;
3302 for (i=0; i < info->rbuf_count; i++) {
3304 info->rbufs[i].pdesc = pbufs + (i * sizeof(struct slgt_desc));
3307 if (i == info->rbuf_count - 1)
3308 info->rbufs[i].next = cpu_to_le32(pbufs);
3310 info->rbufs[i].next = cpu_to_le32(pbufs + ((i+1) * sizeof(struct slgt_desc)));
3311 set_desc_count(info->rbufs[i], DMABUFSIZE);
3314 for (i=0; i < info->tbuf_count; i++) {
3316 info->tbufs[i].pdesc = pbufs + ((info->rbuf_count + i) * sizeof(struct slgt_desc));
3319 if (i == info->tbuf_count - 1)
3320 info->tbufs[i].next = cpu_to_le32(pbufs + info->rbuf_count * sizeof(struct slgt_desc));
3322 info->tbufs[i].next = cpu_to_le32(pbufs + ((info->rbuf_count + i + 1) * sizeof(struct slgt_desc)));
3328 static void free_desc(struct slgt_info *info)
3330 if (info->bufs != NULL) {
3331 dma_free_coherent(&info->pdev->dev, DESC_LIST_SIZE,
3332 info->bufs, info->bufs_dma_addr);
3333 info->bufs = NULL;
3334 info->rbufs = NULL;
3335 info->tbufs = NULL;
3339 static int alloc_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
3343 bufs[i].buf = dma_alloc_coherent(&info->pdev->dev, DMABUFSIZE,
3352 static void free_bufs(struct slgt_info *info, struct slgt_desc *bufs, int count)
3358 dma_free_coherent(&info->pdev->dev, DMABUFSIZE, bufs[i].buf,
3364 static int alloc_dma_bufs(struct slgt_info *info)
3366 info->rbuf_count = 32;
3367 info->tbuf_count = 32;
3369 if (alloc_desc(info) < 0 ||
3370 alloc_bufs(info, info->rbufs, info->rbuf_count) < 0 ||
3371 alloc_bufs(info, info->tbufs, info->tbuf_count) < 0 ||
3372 alloc_tmp_rbuf(info) < 0) {
3373 DBGERR(("%s DMA buffer alloc fail\n", info->device_name));
3376 reset_rbufs(info);
3380 static void free_dma_bufs(struct slgt_info *info)
3382 if (info->bufs) {
3383 free_bufs(info, info->rbufs, info->rbuf_count);
3384 free_bufs(info, info->tbufs, info->tbuf_count);
3385 free_desc(info);
3387 free_tmp_rbuf(info);
3390 static int claim_resources(struct slgt_info *info)
3392 if (request_mem_region(info->phys_reg_addr, SLGT_REG_SIZE, "synclink_gt") == NULL) {
3394 info->device_name, info->phys_reg_addr));
3395 info->init_error = DiagStatus_AddressConflict;
3399 info->reg_addr_requested = true;
3401 info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE);
3402 if (!info->reg_addr) {
3404 info->device_name, info->phys_reg_addr));
3405 info->init_error = DiagStatus_CantAssignPciResources;
3411 release_resources(info);
3415 static void release_resources(struct slgt_info *info)
3417 if (info->irq_requested) {
3418 free_irq(info->irq_level, info);
3419 info->irq_requested = false;
3422 if (info->reg_addr_requested) {
3423 release_mem_region(info->phys_reg_addr, SLGT_REG_SIZE);
3424 info->reg_addr_requested = false;
3427 if (info->reg_addr) {
3428 iounmap(info->reg_addr);
3429 info->reg_addr = NULL;
3436 static void add_device(struct slgt_info *info)
3440 info->next_device = NULL;
3441 info->line = slgt_device_count;
3442 sprintf(info->device_name, "%s%d", tty_dev_prefix, info->line);
3444 if (info->line < MAX_DEVICES) {
3445 if (maxframe[info->line])
3446 info->max_frame_size = maxframe[info->line];
3452 slgt_device_list = info;
3457 current_dev->next_device = info;
3460 if (info->max_frame_size < 4096)
3461 info->max_frame_size = 4096;
3462 else if (info->max_frame_size > 65535)
3463 info->max_frame_size = 65535;
3465 switch(info->pdev->device) {
3477 info->params.mode = MGSL_MODE_ASYNC;
3483 devstr, info->device_name, info->phys_reg_addr,
3484 info->irq_level, info->max_frame_size);
3487 hdlcdev_init(info);
3501 struct slgt_info *info;
3503 info = kzalloc(sizeof(struct slgt_info), GFP_KERNEL);
3505 if (!info) {
3509 tty_port_init(&info->port);
3510 info->port.ops = &slgt_port_ops;
3511 info->magic = MGSL_MAGIC;
3512 INIT_WORK(&info->task, bh_handler);
3513 info->max_frame_size = 4096;
3514 info->base_clock = 14745600;
3515 info->rbuf_fill_level = DMABUFSIZE;
3516 info->port.close_delay = 5*HZ/10;
3517 info->port.closing_wait = 30*HZ;
3518 init_waitqueue_head(&info->status_event_wait_q);
3519 init_waitqueue_head(&info->event_wait_q);
3520 spin_lock_init(&info->netlock);
3521 memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
3522 info->idle_mode = HDLC_TXIDLE_FLAGS;
3523 info->adapter_num = adapter_num;
3524 info->port_num = port_num;
3526 timer_setup(&info->tx_timer, tx_timeout, 0);
3527 timer_setup(&info->rx_timer, rx_timeout, 0);
3529 /* Copy configuration info to device instance data */
3530 info->pdev = pdev;
3531 info->irq_level = pdev->irq;
3532 info->phys_reg_addr = pci_resource_start(pdev,0);
3534 info->bus_type = MGSL_BUS_TYPE_PCI;
3535 info->irq_flags = IRQF_SHARED;
3537 info->init_error = -1; /* assume error, set to 0 on successful init */
3540 return info;
3605 struct slgt_info *info = port_array[i];
3606 tty_port_register_device(&info->port, serial_driver, info->line,
3607 &info->pdev->dev);
3656 struct slgt_info *info;
3662 for (info=slgt_device_list ; info != NULL ; info=info->next_device)
3663 tty_unregister_device(serial_driver, info->line);
3671 info = slgt_device_list;
3672 while(info) {
3673 reset_port(info);
3674 info = info->next_device;
3678 info = slgt_device_list;
3679 while(info) {
3681 hdlcdev_exit(info);
3683 free_dma_bufs(info);
3684 free_tmp_rbuf(info);
3685 if (info->port_num == 0)
3686 release_resources(info);
3687 tmp = info;
3688 info = info->next_device;
3767 unsigned long reg_addr = ((unsigned long)info->reg_addr) + addr; \
3769 reg_addr += (info->port_num) * 32; \
3771 reg_addr += (info->port_num) * 16;
3773 static __u8 rd_reg8(struct slgt_info *info, unsigned int addr)
3779 static void wr_reg8(struct slgt_info *info, unsigned int addr, __u8 value)
3785 static __u16 rd_reg16(struct slgt_info *info, unsigned int addr)
3791 static void wr_reg16(struct slgt_info *info, unsigned int addr, __u16 value)
3797 static __u32 rd_reg32(struct slgt_info *info, unsigned int addr)
3803 static void wr_reg32(struct slgt_info *info, unsigned int addr, __u32 value)
3809 static void rdma_reset(struct slgt_info *info)
3814 wr_reg32(info, RDCSR, BIT1);
3818 if (!(rd_reg32(info, RDCSR) & BIT0))
3822 static void tdma_reset(struct slgt_info *info)
3827 wr_reg32(info, TDCSR, BIT1);
3831 if (!(rd_reg32(info, TDCSR) & BIT0))
3840 static void enable_loopback(struct slgt_info *info)
3843 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT2));
3845 if (info->params.mode != MGSL_MODE_ASYNC) {
3854 wr_reg8(info, CCR, 0x49);
3857 if (info->params.clock_speed)
3858 set_rate(info, info->params.clock_speed);
3860 set_rate(info, 3686400);
3867 static void set_rate(struct slgt_info *info, u32 rate)
3870 unsigned int osc = info->base_clock;
3882 wr_reg16(info, BDR, (unsigned short)div);
3886 static void rx_stop(struct slgt_info *info)
3891 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3892 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3893 wr_reg16(info, RCR, val); /* clear reset bit */
3895 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA + IRQ_RXIDLE);
3898 wr_reg16(info, SSR, IRQ_RXIDLE + IRQ_RXOVER);
3900 rdma_reset(info);
3902 info->rx_enabled = false;
3903 info->rx_restart = false;
3906 static void rx_start(struct slgt_info *info)
3910 slgt_irq_off(info, IRQ_RXOVER + IRQ_RXDATA);
3913 wr_reg16(info, SSR, IRQ_RXOVER);
3916 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3917 wr_reg16(info, RCR, (unsigned short)(val | BIT2)); /* set reset bit */
3918 wr_reg16(info, RCR, val); /* clear reset bit */
3920 rdma_reset(info);
3921 reset_rbufs(info);
3923 if (info->rx_pio) {
3925 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) & ~BIT14));
3926 slgt_irq_on(info, IRQ_RXDATA);
3927 if (info->params.mode == MGSL_MODE_ASYNC) {
3929 wr_reg32(info, RDCSR, BIT6);
3933 wr_reg16(info, SCR, (unsigned short)(rd_reg16(info, SCR) | BIT14));
3935 wr_reg32(info, RDDAR, info->rbufs[0].pdesc);
3937 if (info->params.mode != MGSL_MODE_ASYNC) {
3939 wr_reg32(info, RDCSR, (BIT2 + BIT0));
3942 wr_reg32(info, RDCSR, (BIT6 + BIT2 + BIT0));
3946 slgt_irq_on(info, IRQ_RXOVER);
3949 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1));
3951 info->rx_restart = false;
3952 info->rx_enabled = true;
3955 static void tx_start(struct slgt_info *info)
3957 if (!info->tx_enabled) {
3958 wr_reg16(info, TCR,
3959 (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2));
3960 info->tx_enabled = true;
3963 if (desc_count(info->tbufs[info->tbuf_start])) {
3964 info->drop_rts_on_tx_done = false;
3966 if (info->params.mode != MGSL_MODE_ASYNC) {
3967 if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
3968 get_gtsignals(info);
3969 if (!(info->signals & SerialSignal_RTS)) {
3970 info->signals |= SerialSignal_RTS;
3971 set_gtsignals(info);
3972 info->drop_rts_on_tx_done = true;
3976 slgt_irq_off(info, IRQ_TXDATA);
3977 slgt_irq_on(info, IRQ_TXUNDER + IRQ_TXIDLE);
3979 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
3981 slgt_irq_off(info, IRQ_TXDATA);
3982 slgt_irq_on(info, IRQ_TXIDLE);
3984 wr_reg16(info, SSR, IRQ_TXIDLE);
3987 wr_reg32(info, TDDAR, info->tbufs[info->tbuf_start].pdesc);
3988 wr_reg32(info, TDCSR, BIT2 + BIT0);
3989 info->tx_active = true;
3993 static void tx_stop(struct slgt_info *info)
3997 del_timer(&info->tx_timer);
3999 tdma_reset(info);
4002 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */
4003 wr_reg16(info, TCR, (unsigned short)(val | BIT2)); /* set reset bit */
4005 slgt_irq_off(info, IRQ_TXDATA + IRQ_TXIDLE + IRQ_TXUNDER);
4008 wr_reg16(info, SSR, (unsigned short)(IRQ_TXIDLE + IRQ_TXUNDER));
4010 reset_tbufs(info);
4012 info->tx_enabled = false;
4013 info->tx_active = false;
4016 static void reset_port(struct slgt_info *info)
4018 if (!info->reg_addr)
4021 tx_stop(info);
4022 rx_stop(info);
4024 info->signals &= ~(SerialSignal_RTS | SerialSignal_DTR);
4025 set_gtsignals(info);
4027 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
4030 static void reset_adapter(struct slgt_info *info)
4033 for (i=0; i < info->port_count; ++i) {
4034 if (info->port_array[i])
4035 reset_port(info->port_array[i]);
4039 static void async_mode(struct slgt_info *info)
4043 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
4044 tx_stop(info);
4045 rx_stop(info);
4067 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
4070 if (info->params.parity != ASYNC_PARITY_NONE) {
4072 if (info->params.parity == ASYNC_PARITY_ODD)
4076 switch (info->params.data_bits)
4083 if (info->params.stop_bits != 1)
4086 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4089 wr_reg16(info, TCR, val);
4110 if (info->params.parity != ASYNC_PARITY_NONE) {
4112 if (info->params.parity == ASYNC_PARITY_ODD)
4116 switch (info->params.data_bits)
4123 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4126 wr_reg16(info, RCR, val);
4137 wr_reg8(info, CCR, 0x69);
4139 msc_set_vcr(info);
4162 if ((rd_reg32(info, JCR) & BIT8) && info->params.data_rate &&
4163 ((info->base_clock < (info->params.data_rate * 16)) ||
4164 (info->base_clock % (info->params.data_rate * 16)))) {
4167 set_rate(info, info->params.data_rate * 8);
4170 set_rate(info, info->params.data_rate * 16);
4172 wr_reg16(info, SCR, val);
4174 slgt_irq_on(info, IRQ_RXBREAK | IRQ_RXOVER);
4176 if (info->params.loopback)
4177 enable_loopback(info);
4180 static void sync_mode(struct slgt_info *info)
4184 slgt_irq_off(info, IRQ_ALL | IRQ_MASTER);
4185 tx_stop(info);
4186 rx_stop(info);
4210 switch(info->params.mode) {
4218 if (info->if_mode & MGSL_INTERFACE_RTS_EN)
4221 switch(info->params.encoding)
4232 switch (info->params.crc_type & HDLC_CRC_MASK)
4238 if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
4241 switch (info->params.preamble_length)
4248 if (info->params.flags & HDLC_FLAG_AUTO_CTS)
4251 wr_reg16(info, TCR, val);
4255 switch (info->params.preamble)
4264 wr_reg8(info, TPR, (unsigned char)val);
4285 switch(info->params.mode) {
4294 switch(info->params.encoding)
4305 switch (info->params.crc_type & HDLC_CRC_MASK)
4311 if (info->params.flags & HDLC_FLAG_AUTO_DCD)
4314 wr_reg16(info, RCR, val);
4325 if (info->params.flags & HDLC_FLAG_TXC_BRG)
4330 if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4335 else if (info->params.flags & HDLC_FLAG_TXC_DPLL)
4337 else if (info->params.flags & HDLC_FLAG_TXC_RXCPIN)
4340 if (info->params.flags & HDLC_FLAG_RXC_BRG)
4342 else if (info->params.flags & HDLC_FLAG_RXC_DPLL)
4344 else if (info->params.flags & HDLC_FLAG_RXC_TXCPIN)
4347 if (info->params.clock_speed)
4350 wr_reg8(info, CCR, (unsigned char)val);
4352 if (info->params.flags & (HDLC_FLAG_TXC_DPLL + HDLC_FLAG_RXC_DPLL))
4355 switch(info->params.encoding)
4365 wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | val));
4368 set_rate(info, info->params.clock_speed * 16);
4371 set_rate(info, info->params.clock_speed);
4373 tx_set_idle(info);
4375 msc_set_vcr(info);
4396 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0);
4398 if (info->params.loopback)
4399 enable_loopback(info);
4405 static void tx_set_idle(struct slgt_info *info)
4413 tcr = rd_reg16(info, TCR);
4414 if (info->idle_mode & HDLC_TXIDLE_CUSTOM_16) {
4418 wr_reg8(info, TPR, (unsigned char)((info->idle_mode >> 8) & 0xff));
4423 wr_reg16(info, TCR, tcr);
4425 if (info->idle_mode & (HDLC_TXIDLE_CUSTOM_8 | HDLC_TXIDLE_CUSTOM_16)) {
4427 val = (unsigned char)(info->idle_mode & 0xff);
4430 switch(info->idle_mode)
4441 wr_reg8(info, TIR, val);
4447 static void get_gtsignals(struct slgt_info *info)
4449 unsigned short status = rd_reg16(info, SSR);
4452 info->signals &= SerialSignal_RTS | SerialSignal_DTR;
4455 info->signals |= SerialSignal_DSR;
4457 info->signals |= SerialSignal_CTS;
4459 info->signals |= SerialSignal_DCD;
4461 info->signals |= SerialSignal_RI;
4467 static void msc_set_vcr(struct slgt_info *info)
4480 switch(info->if_mode & MGSL_INTERFACE_MASK)
4493 if (info->if_mode & MGSL_INTERFACE_MSB_FIRST)
4495 if (info->signals & SerialSignal_DTR)
4497 if (info->signals & SerialSignal_RTS)
4499 if (info->if_mode & MGSL_INTERFACE_LL)
4501 if (info->if_mode & MGSL_INTERFACE_RL)
4503 wr_reg8(info, VCR, val);
4509 static void set_gtsignals(struct slgt_info *info)
4511 unsigned char val = rd_reg8(info, VCR);
4512 if (info->signals & SerialSignal_DTR)
4516 if (info->signals & SerialSignal_RTS)
4520 wr_reg8(info, VCR, val);
4526 static void free_rbufs(struct slgt_info *info, unsigned int i, unsigned int last)
4532 info->rbufs[i].status = 0;
4533 set_desc_count(info->rbufs[i], info->rbuf_fill_level);
4536 if (++i == info->rbuf_count)
4539 info->rbuf_current = i;
4545 static void reset_rbufs(struct slgt_info *info)
4547 free_rbufs(info, 0, info->rbuf_count - 1);
4548 info->rbuf_fill_index = 0;
4549 info->rbuf_fill_count = 0;
4557 static bool rx_get_frame(struct slgt_info *info)
4563 struct tty_struct *tty = info->port.tty;
4567 switch (info->params.crc_type & HDLC_CRC_MASK) {
4576 start = end = info->rbuf_current;
4579 if (!desc_complete(info->rbufs[end]))
4582 if (framesize == 0 && info->params.addr_filter != 0xff)
4583 addr_field = info->rbufs[end].buf[0];
4585 framesize += desc_count(info->rbufs[end]);
4587 if (desc_eof(info->rbufs[end]))
4590 if (++end == info->rbuf_count)
4593 if (end == info->rbuf_current) {
4594 if (info->rx_enabled){
4595 spin_lock_irqsave(&info->lock,flags);
4596 rx_start(info);
4597 spin_unlock_irqrestore(&info->lock,flags);
4612 status = desc_status(info->rbufs[end]);
4615 if ((info->params.crc_type & HDLC_CRC_MASK) == HDLC_CRC_NONE)
4619 (addr_field != 0xff && addr_field != info->params.addr_filter)) {
4620 free_rbufs(info, start, end);
4625 info->icount.rxshort++;
4628 info->icount.rxcrc++;
4629 if (!(info->params.crc_type & HDLC_CRC_RETURN_EX))
4635 info->netdev->stats.rx_errors++;
4636 info->netdev->stats.rx_frame_errors++;
4641 info->device_name, status, framesize));
4642 DBGDATA(info, info->rbufs[start].buf, min_t(int, framesize, info->rbuf_fill_level), "rx");
4645 if (!(info->params.crc_type & HDLC_CRC_RETURN_EX)) {
4650 if (framesize > info->max_frame_size + crc_size)
4651 info->icount.rxlong++;
4656 unsigned char *p = info->tmp_rbuf;
4657 info->tmp_rbuf_count = framesize;
4659 info->icount.rxok++;
4662 int partial_count = min_t(int, copy_count, info->rbuf_fill_level);
4663 memcpy(p, info->rbufs[i].buf, partial_count);
4666 if (++i == info->rbuf_count)
4670 if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
4676 if (info->netcount)
4677 hdlcdev_rx(info,info->tmp_rbuf, framesize);
4680 ldisc_receive_buf(tty, info->tmp_rbuf, info->flag_buf, framesize);
4683 free_rbufs(info, start, end);
4694 static bool rx_get_buf(struct slgt_info *info)
4696 unsigned int i = info->rbuf_current;
4699 if (!desc_complete(info->rbufs[i]))
4701 count = desc_count(info->rbufs[i]);
4702 switch(info->params.mode) {
4707 if (desc_residue(info->rbufs[i]))
4711 DBGDATA(info, info->rbufs[i].buf, count, "rx");
4714 ldisc_receive_buf(info->port.tty, info->rbufs[i].buf,
4715 info->flag_buf, count);
4716 free_rbufs(info, i, i);
4720 static void reset_tbufs(struct slgt_info *info)
4723 info->tbuf_current = 0;
4724 for (i=0 ; i < info->tbuf_count ; i++) {
4725 info->tbufs[i].status = 0;
4726 info->tbufs[i].count = 0;
4733 static unsigned int free_tbuf_count(struct slgt_info *info)
4736 unsigned int i = info->tbuf_current;
4740 if (desc_count(info->tbufs[i]))
4743 if (++i == info->tbuf_count)
4745 } while (i != info->tbuf_current);
4748 if (count && (rd_reg32(info, TDCSR) & BIT0))
4758 static unsigned int tbuf_bytes(struct slgt_info *info)
4761 unsigned int i = info->tbuf_current;
4778 count = desc_count(info->tbufs[i]);
4782 active_buf_count = info->tbufs[i].buf_count;
4783 if (++i == info->tbuf_count)
4785 } while (i != info->tbuf_current);
4788 reg_value = rd_reg32(info, TDCSR);
4798 if (info->tx_active)
4808 static bool tx_load(struct slgt_info *info, const char *buf, unsigned int size)
4815 if (DIV_ROUND_UP(size, DMABUFSIZE) > free_tbuf_count(info))
4818 DBGDATA(info, buf, size, "tx");
4831 info->tbuf_start = i = info->tbuf_current;
4834 d = &info->tbufs[i];
4846 if ((!size && info->params.mode == MGSL_MODE_HDLC) ||
4847 info->params.mode == MGSL_MODE_RAW)
4853 if (i != info->tbuf_start)
4857 if (++i == info->tbuf_count)
4861 info->tbuf_current = i;
4864 d = &info->tbufs[info->tbuf_start];
4868 if (!info->tx_active)
4869 tx_start(info);
4870 update_tx_timer(info);
4875 static int register_test(struct slgt_info *info)
4884 wr_reg16(info, TIR, patterns[i]);
4885 wr_reg16(info, BDR, patterns[(i+1)%count]);
4886 if ((rd_reg16(info, TIR) != patterns[i]) ||
4887 (rd_reg16(info, BDR) != patterns[(i+1)%count])) {
4892 info->gpio_present = (rd_reg32(info, JCR) & BIT5) ? 1 : 0;
4893 info->init_error = rc ? 0 : DiagStatus_AddressFailure;
4897 static int irq_test(struct slgt_info *info)
4901 struct tty_struct *oldtty = info->port.tty;
4902 u32 speed = info->params.data_rate;
4904 info->params.data_rate = 921600;
4905 info->port.tty = NULL;
4907 spin_lock_irqsave(&info->lock, flags);
4908 async_mode(info);
4909 slgt_irq_on(info, IRQ_TXIDLE);
4912 wr_reg16(info, TCR,
4913 (unsigned short)(rd_reg16(info, TCR) | BIT1));
4916 wr_reg16(info, TDR, 0);
4919 info->init_error = DiagStatus_IrqFailure;
4920 info->irq_occurred = false;
4922 spin_unlock_irqrestore(&info->lock, flags);
4925 while(timeout-- && !info->irq_occurred)
4928 spin_lock_irqsave(&info->lock,flags);
4929 reset_port(info);
4930 spin_unlock_irqrestore(&info->lock,flags);
4932 info->params.data_rate = speed;
4933 info->port.tty = oldtty;
4935 info->init_error = info->irq_occurred ? 0 : DiagStatus_IrqFailure;
4936 return info->irq_occurred ? 0 : -ENODEV;
4939 static int loopback_test_rx(struct slgt_info *info)
4944 if (desc_complete(info->rbufs[0])) {
4945 count = desc_count(info->rbufs[0]);
4946 src = info->rbufs[0].buf;
4947 dest = info->tmp_rbuf;
4954 info->tmp_rbuf_count++;
4957 DBGDATA(info, info->tmp_rbuf, info->tmp_rbuf_count, "rx");
4963 static int loopback_test(struct slgt_info *info)
4973 struct tty_struct *oldtty = info->port.tty;
4976 memcpy(¶ms, &info->params, sizeof(params));
4978 info->params.mode = MGSL_MODE_ASYNC;
4979 info->params.data_rate = 921600;
4980 info->params.loopback = 1;
4981 info->port.tty = NULL;
4987 info->tmp_rbuf_count = 0;
4988 memset(info->tmp_rbuf, 0, TESTFRAMESIZE);
4991 spin_lock_irqsave(&info->lock,flags);
4992 async_mode(info);
4993 rx_start(info);
4994 tx_load(info, buf, count);
4995 spin_unlock_irqrestore(&info->lock, flags);
5000 if (loopback_test_rx(info)) {
5007 if (!rc && (info->tmp_rbuf_count != count ||
5008 memcmp(buf, info->tmp_rbuf, count))) {
5012 spin_lock_irqsave(&info->lock,flags);
5013 reset_adapter(info);
5014 spin_unlock_irqrestore(&info->lock,flags);
5016 memcpy(&info->params, ¶ms, sizeof(info->params));
5017 info->port.tty = oldtty;
5019 info->init_error = rc ? DiagStatus_DmaFailure : 0;
5023 static int adapter_test(struct slgt_info *info)
5025 DBGINFO(("testing %s\n", info->device_name));
5026 if (register_test(info) < 0) {
5028 info->device_name, info->phys_reg_addr);
5029 } else if (irq_test(info) < 0) {
5031 info->device_name, info->irq_level);
5032 } else if (loopback_test(info) < 0) {
5033 printk("loopback test failure %s\n", info->device_name);
5035 return info->init_error;
5043 struct slgt_info *info = from_timer(info, t, tx_timer);
5046 DBGINFO(("%s tx_timeout\n", info->device_name));
5047 if(info->tx_active && info->params.mode == MGSL_MODE_HDLC) {
5048 info->icount.txtimeout++;
5050 spin_lock_irqsave(&info->lock,flags);
5051 tx_stop(info);
5052 spin_unlock_irqrestore(&info->lock,flags);
5055 if (info->netcount)
5056 hdlcdev_tx_done(info);
5059 bh_transmit(info);
5067 struct slgt_info *info = from_timer(info, t, rx_timer);
5070 DBGINFO(("%s rx_timeout\n", info->device_name));
5071 spin_lock_irqsave(&info->lock, flags);
5072 info->pending_bh |= BH_RECEIVE;
5073 spin_unlock_irqrestore(&info->lock, flags);
5074 bh_handler(&info->task);