Lines Matching defs:enable
26 * uncomment lines below to enable specific types of debug output
363 #define IOER 0x0c /* GPIO interrupt enable */
459 static int tx_enable(struct slgt_info *info, int enable);
461 static int rx_enable(struct slgt_info *info, int enable);
1475 /* enable network layer transmit */
2137 * 02 IRQ enable
2139 * 00 enable
2162 * 02 IRQ enable
2164 * 00 enable
2584 static int tx_enable(struct slgt_info *info, int enable)
2587 DBGINFO(("%s tx_enable(%d)\n", info->device_name, enable));
2589 if (enable) {
2613 static int rx_enable(struct slgt_info *info, int enable)
2617 DBGINFO(("%s rx_enable(%08x)\n", info->device_name, enable));
2620 * enable[31..16] = receive DMA buffer fill level
2624 rbuf_fill_level = ((unsigned int)enable) >> 16;
2639 * enable[1..0] = receiver enable command
2641 * 1 = enable
2642 * 2 = enable or force hunt mode if already enabled
2644 enable &= 3;
2645 if (enable) {
2648 else if (enable == 2) {
2699 /* enable hunt and idle irqs if needed */
2765 /* disable enable exit hunt mode/idle rcvd IRQs */
2851 * xctrl[16] 1 = enable terminal count, 0=disabled
3009 /* enable interrupts for watched pins */
3816 /* wait for enable bit cleared */
3829 /* wait for enable bit cleared */
3836 * enable internal loopback
3842 /* SCR (serial control) BIT2=loopback enable */
3849 * 01 auxclk enable (0 = disable)
3850 * 00 BRG enable (1 = enable)
3891 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3916 val = rd_reg16(info, RCR) & ~BIT1; /* clear enable bit */
3928 /* enable saving of rx status */
3938 /* enable rx DMA and DMA interrupt */
3941 /* enable saving of rx status, rx DMA and DMA interrupt */
3948 /* enable receiver */
4002 val = rd_reg16(info, TCR) & ~BIT1; /* clear enable bit */
4051 * 09 parity enable
4054 * 06 1=break enable
4062 * 01 enable
4063 * 00 auto-CTS enable
4095 * 09 parity enable
4105 * 01 enable
4106 * 00 auto-DCD enable
4145 * 13 tx data IRQ enable
4146 * 12 tx idle IRQ enable
4147 * 11 rx break on IRQ enable
4148 * 10 rx data IRQ enable
4149 * 09 rx break off IRQ enable
4150 * 08 overrun IRQ enable
4151 * 07 DSR IRQ enable
4152 * 06 CTS IRQ enable
4153 * 05 DCD IRQ enable
4154 * 04 RI IRQ enable
4156 * 02 1=txd->rxd internal loopback enable
4158 * 00 1=master IRQ enable
4198 * 09 CRC enable
4201 * 06 preamble enable
4205 * 01 enable
4206 * 00 auto-CTS enable
4276 * 09 CRC enable
4280 * 01 enable
4281 * 00 auto-DCD enable
4320 * 01 auxclk enable
4321 * 00 BRG enable
4381 * 13 tx data IRQ enable
4382 * 12 tx idle IRQ enable
4383 * 11 underrun IRQ enable
4384 * 10 rx data IRQ enable
4385 * 09 rx idle IRQ enable
4386 * 08 overrun IRQ enable
4387 * 07 DSR IRQ enable
4388 * 06 CTS IRQ enable
4389 * 05 DCD IRQ enable
4390 * 04 RI IRQ enable
4392 * 02 1=txd->rxd internal loopback enable
4394 * 00 1=master IRQ enable
4911 /* enable transmitter */