Lines Matching defs:data

32  * DBGDATA   output receive and transmit data
164 unsigned int data;
175 __le32 pbuf; /* physical address of data buffer */
179 char *buf; /* virtual address of data buffer */
210 * device instance data structure
366 #define TDR 0x80 /* tx data */
367 #define RDR 0x80 /* rx data */
496 static void trace_block(struct slgt_info *info, const char *data, int count, const char *label)
500 printk("%s %s data:\n",info->device_name, label);
504 printk("%02X ",(unsigned char)data[i]);
508 if (data[i]>=040 && data[i]<=0176)
509 printk("%c",data[i]);
514 data += linecount;
574 * ldisc_receive_buf - pass receive data to line discipline
577 const __u8 *data, char *flags, int count)
585 ld->ops->receive_buf(tty, data, flags, count);
749 * based on data in buffers (tbuf_bytes) and FIFO (128 bytes)
778 /* send accumulated data from send_char() */
960 * tty pointer to tty instance data
1270 * signal remote device to throttle send data (our receive data)
1291 * signal remote device to stop throttling send data (our receive data)
1420 tx_load(info, skb->data, skb->len);
1552 ifr->ifr_settings.size = size; /* data size wanted */
1659 * @buf: pointer to buffer contianing frame data
1660 * @size: count of data bytes in buf
1762 * get async data from rx DMA buffers
2049 /* async mode saves status byte to buffer for each data byte */
2170 // run bottom half to get more send data from user
2261 if (w->data & changed) {
2262 w->data = state;
2486 * FIFO (32 bytes) at specified data rate
2884 __u32 data;
2896 data = rd_reg32(info, IODR);
2897 data |= gpio.dmask & gpio.dir;
2898 data &= ~(gpio.dmask & ~gpio.dir);
2899 wr_reg32(info, IODR, data);
2902 data = rd_reg32(info, IOVR);
2903 data |= gpio.smask & gpio.state;
2904 data &= ~(gpio.smask & ~gpio.state);
2905 wr_reg32(info, IOVR, data);
2934 static void init_cond_wait(struct cond_wait *w, unsigned int data)
2938 w->data = data;
3025 gpio.state = wait.data;
3433 /* Add the specified device instance data structure to the
3529 /* Copy configuration info to device instance data */
4145 * 13 tx data IRQ enable
4148 * 10 rx data IRQ enable
4329 // transmit clock at actual data rate
4381 * 13 tx data IRQ enable
4384 * 10 rx data IRQ enable
4805 * load data into transmit DMA buffer ring and start transmitter if needed
4806 * return true if data accepted, otherwise false (buffers full)
4821 * copy data to one or more DMA buffers in circular ring
4822 * tbuf_start = first buffer for this data
4825 * Copy all data before making data visible to DMA controller by
4863 /* set first buffer count to make new data visible to DMA controller */
4950 /* src=data byte (src+1)=status byte */