Lines Matching refs:set

37  * is set for the device). The functionality is determined by which
206 u32 max_frame_size; /* as set by device config */
822 unsigned int set, unsigned int clear);
835 /* set non-zero on successful registration with PCI subsystem */
1381 /* for diagnostics set IRQ flag */
1951 /* if port data rate is set to 460800 or less then
2460 * set the serial parameters
2527 /* mgsl_set_txidle() service ioctl to set transmit idle mode
2851 /* set modem control signals (DTR/RTS)
2854 unsigned int set, unsigned int clear)
2861 __FILE__,__LINE__,info->device_name, set, clear);
2863 if (set & TIOCM_RTS)
2865 if (set & TIOCM_DTR)
2882 * break_state -1=set break condition, 0=clear
3261 /* nonblock mode is set or port is not enabled */
3600 * A buffer list is a set of buffer entries where each entry contains
4481 * modern chips. If an underrun occurs and this bit is set,
4567 /* set up receive address filtering */
4890 outw( BIT8, info->io_base ); /* set Master Bus Enable (DCAR) */
5060 /* set Internal Data loopback mode */
5163 /* count set to zero) but there is no terminiting buffer */
5164 /* (status set to non-zero). */
5180 /* Status field has been set by 16C32. */
5388 /* RTS and set a flag indicating that the driver should */
5741 * Note: For async mode the receive FIFO level must be set
5977 * transmitter has been set to Monosync in order to try to mimic
5980 * patterns to the idle mode set here
6028 /* set serial signal bits to reflect MISR */
6183 * buffer is available for use and set the current buffer to the
6225 * and set the current buffer to the first buffer. This effectively
6266 /* field and set the count field to DMA Buffer Size. */
6289 /* set current buffer to next buffer after last buffer of frame */
6317 * field is set by the 16C32 after completing a receive frame.
6385 * set to 0xffff) minus the ending value of the RCC (decremented
6512 * receive frame. The status field is set by the 16C32 after
6558 * set to 0xffff) minus the ending value of the RCC (decremented
6676 /* set CMR:13 to start transmit when
6714 /* Also set the data count for this individual DMA buffer. */
6918 /* clear status, set max receive buffer size */
7407 /* set CMR:13 to insert into loop on next GoAhead (RxAbort) */
7655 case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
7883 * LCR base address bit 7 is set. Maintain shadow