Lines Matching defs:usc_InDmaReg
638 usc_OutDmaReg( (a), DICR, (u16)(usc_InDmaReg((a),DICR) | (b)) )
641 usc_OutDmaReg( (a), DICR, (u16)(usc_InDmaReg((a),DICR) & ~(b)) )
663 static u16 usc_InDmaReg( struct mgsl_struct *info, u16 Port );
1599 status = usc_InDmaReg( info, RDMR );
1644 status = usc_InDmaReg( info, TDMR );
1692 DmaVector = usc_InDmaReg(info, DIVR);
3497 u16 Tdmr = usc_InDmaReg( info, TDMR );
3500 u16 Rdmr = usc_InDmaReg( info, RDMR );
4394 * usc_InDmaReg()
4408 static u16 usc_InDmaReg( struct mgsl_struct *info, u16 RegAddr )
4416 } /* end of usc_InDmaReg() */
4964 usc_InDmaReg( info, RDMR ); /* clear pending receive DMA IRQ bits */
4965 usc_InDmaReg( info, TDMR ); /* clear pending transmit DMA IRQ bits */
5256 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT1) );
5345 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT1) );
5451 usc_OutDmaReg( info, DICR, (u16)(usc_InDmaReg(info,DICR) | BIT0) );
6755 (usc_InDmaReg( info, DIVR ) != 0) ){
6776 (usc_InDmaReg( info, TBCR ) != BitPatterns[(i+5)%Patterncount]) ){
6949 usc_InDmaReg( info, RDMR );
6972 status = usc_InDmaReg( info, RDMR );