Lines Matching refs:SDLC
110 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */
132 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
144 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
154 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
156 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
174 #define LOOPMODE 2 /* SDLC Loop mode */
175 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */
219 #define WR7P_EN 1 /* WR7 Prime SDLC Feature Enable */
253 #define END_FR 0x80 /* End of Frame (SDLC) */
267 /* Read Register 6 (SDLC FIFO Status and Byte Count LSB) */
269 /* Read Register 7 (SDLC FIFO Status and Byte Count MSB) */