Lines Matching defs:vt8500_port
95 struct vt8500_port {
124 struct vt8500_port *vt8500_port = container_of(port,
125 struct vt8500_port,
128 vt8500_port->ier &= ~TX_FIFO_INTS;
129 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
134 struct vt8500_port *vt8500_port = container_of(port,
135 struct vt8500_port,
138 vt8500_port->ier &= ~RX_FIFO_INTS;
139 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
144 struct vt8500_port *vt8500_port = container_of(port,
145 struct vt8500_port,
148 vt8500_port->ier |= TCTS;
149 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
225 struct vt8500_port *vt8500_port = container_of(port,
226 struct vt8500_port,
229 vt8500_port->ier &= ~TX_FIFO_INTS;
230 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
232 vt8500_port->ier |= TX_FIFO_INTS;
233 vt8500_write(port, vt8500_port->ier, VT8500_URIER);
304 struct vt8500_port *vt8500_port =
305 container_of(port, struct vt8500_port, uart);
309 div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16;
328 struct vt8500_port *vt8500_port =
329 container_of(port, struct vt8500_port, uart);
332 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
336 vt8500_port->name, port);
347 struct vt8500_port *vt8500_port =
348 container_of(port, struct vt8500_port, uart);
350 vt8500_port->ier = 0;
353 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
354 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
362 struct vt8500_port *vt8500_port =
363 container_of(port, struct vt8500_port, uart);
377 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
405 if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH)
409 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
419 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
420 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
425 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
430 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
431 vt8500_port->ier |= TCTS;
433 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
434 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
441 struct vt8500_port *vt8500_port =
442 container_of(port, struct vt8500_port, uart);
443 return vt8500_port->name;
470 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
498 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
503 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
504 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
506 uart_console_write(&vt8500_port->uart, s, count,
513 wait_for_xmitr(&vt8500_port->uart);
514 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
519 struct vt8500_port *vt8500_port;
528 vt8500_port = vt8500_uart_ports[co->index];
530 if (!vt8500_port)
536 return uart_set_options(&vt8500_port->uart,
625 struct vt8500_port *vt8500_port;
667 vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
669 if (!vt8500_port)
672 vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres);
673 if (IS_ERR(vt8500_port->uart.membase))
674 return PTR_ERR(vt8500_port->uart.membase);
676 vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
677 if (IS_ERR(vt8500_port->clk)) {
682 ret = clk_prepare_enable(vt8500_port->clk);
688 vt8500_port->vt8500_uart_flags = *flags;
689 vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST(
690 clk_get_rate(vt8500_port->clk),
693 vt8500_port->uart.type = PORT_VT8500;
694 vt8500_port->uart.iotype = UPIO_MEM;
695 vt8500_port->uart.mapbase = mmres->start;
696 vt8500_port->uart.irq = irqres->start;
697 vt8500_port->uart.fifosize = 16;
698 vt8500_port->uart.ops = &vt8500_uart_pops;
699 vt8500_port->uart.line = port;
700 vt8500_port->uart.dev = &pdev->dev;
701 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
702 vt8500_port->uart.has_sysrq = IS_ENABLED(CONFIG_SERIAL_VT8500_CONSOLE);
705 vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /
706 vt8500_port->clk_predivisor /
709 snprintf(vt8500_port->name, sizeof(vt8500_port->name),
712 vt8500_uart_ports[port] = vt8500_port;
714 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
716 platform_set_drvdata(pdev, vt8500_port);