Lines Matching refs:port

55 #define siu_read(port, offset)		readb((port)->membase + (offset))
56 #define siu_write(port, offset, value) writeb((value), (port)->membase + (offset))
60 struct uart_port *port;
64 port = &siu_uart_ports[0];
66 spin_lock_irqsave(&port->lock, flags);
68 irsel = siu_read(port, SIUIRSEL);
73 siu_write(port, SIUIRSEL, irsel);
75 spin_unlock_irqrestore(&port->lock, flags);
81 struct uart_port *port;
85 port = &siu_uart_ports[0];
87 spin_lock_irqsave(&port->lock, flags);
89 irsel = siu_read(port, SIUIRSEL);
94 siu_write(port, SIUIRSEL, irsel);
96 spin_unlock_irqrestore(&port->lock, flags);
102 struct uart_port *port;
106 port = &siu_uart_ports[0];
108 spin_lock_irqsave(&port->lock, flags);
110 irsel = siu_read(port, SIUIRSEL);
127 siu_write(port, SIUIRSEL, irsel);
129 spin_unlock_irqrestore(&port->lock, flags);
133 static inline void siu_clear_fifo(struct uart_port *port)
135 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO);
136 siu_write(port, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
138 siu_write(port, UART_FCR, 0);
141 static inline unsigned long siu_port_size(struct uart_port *port)
143 switch (port->type) {
153 static inline unsigned int siu_check_type(struct uart_port *port)
155 if (port->line == 0)
157 if (port->line == 1 && port->irq)
163 static inline const char *siu_type_name(struct uart_port *port)
165 switch (port->type) {
175 static unsigned int siu_tx_empty(struct uart_port *port)
179 lsr = siu_read(port, UART_LSR);
186 static void siu_set_mctrl(struct uart_port *port, unsigned int mctrl)
201 siu_write(port, UART_MCR, mcr);
204 static unsigned int siu_get_mctrl(struct uart_port *port)
209 msr = siu_read(port, UART_MSR);
222 static void siu_stop_tx(struct uart_port *port)
227 spin_lock_irqsave(&port->lock, flags);
229 ier = siu_read(port, UART_IER);
231 siu_write(port, UART_IER, ier);
233 spin_unlock_irqrestore(&port->lock, flags);
236 static void siu_start_tx(struct uart_port *port)
241 spin_lock_irqsave(&port->lock, flags);
243 ier = siu_read(port, UART_IER);
245 siu_write(port, UART_IER, ier);
247 spin_unlock_irqrestore(&port->lock, flags);
250 static void siu_stop_rx(struct uart_port *port)
255 spin_lock_irqsave(&port->lock, flags);
257 ier = siu_read(port, UART_IER);
259 siu_write(port, UART_IER, ier);
261 port->read_status_mask &= ~UART_LSR_DR;
263 spin_unlock_irqrestore(&port->lock, flags);
266 static void siu_enable_ms(struct uart_port *port)
271 spin_lock_irqsave(&port->lock, flags);
273 ier = siu_read(port, UART_IER);
275 siu_write(port, UART_IER, ier);
277 spin_unlock_irqrestore(&port->lock, flags);
280 static void siu_break_ctl(struct uart_port *port, int ctl)
285 spin_lock_irqsave(&port->lock, flags);
287 lcr = siu_read(port, UART_LCR);
292 siu_write(port, UART_LCR, lcr);
294 spin_unlock_irqrestore(&port->lock, flags);
297 static inline void receive_chars(struct uart_port *port, uint8_t *status)
306 ch = siu_read(port, UART_RX);
307 port->icount.rx++;
311 lsr |= lsr_break_flag[port->line];
312 lsr_break_flag[port->line] = 0;
318 port->icount.brk++;
320 if (uart_handle_break(port))
325 port->icount.frame++;
327 port->icount.parity++;
329 port->icount.overrun++;
331 lsr &= port->read_status_mask;
340 if (uart_handle_sysrq_char(port, ch))
343 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
346 lsr = siu_read(port, UART_LSR);
349 tty_flip_buffer_push(&port->state->port);
354 static inline void check_modem_status(struct uart_port *port)
358 msr = siu_read(port, UART_MSR);
362 uart_handle_dcd_change(port, msr & UART_MSR_DCD);
364 port->icount.rng++;
366 port->icount.dsr++;
368 uart_handle_cts_change(port, msr & UART_MSR_CTS);
370 wake_up_interruptible(&port->state->port.delta_msr_wait);
373 static inline void transmit_chars(struct uart_port *port)
378 xmit = &port->state->xmit;
380 if (port->x_char) {
381 siu_write(port, UART_TX, port->x_char);
382 port->icount.tx++;
383 port->x_char = 0;
387 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
388 siu_stop_tx(port);
393 siu_write(port, UART_TX, xmit->buf[xmit->tail]);
395 port->icount.tx++;
401 uart_write_wakeup(port);
404 siu_stop_tx(port);
409 struct uart_port *port;
412 port = (struct uart_port *)dev_id;
414 iir = siu_read(port, UART_IIR);
418 lsr = siu_read(port, UART_LSR);
420 receive_chars(port, &lsr);
422 check_modem_status(port);
425 transmit_chars(port);
430 static int siu_startup(struct uart_port *port)
434 if (port->membase == NULL)
437 siu_clear_fifo(port);
439 (void)siu_read(port, UART_LSR);
440 (void)siu_read(port, UART_RX);
441 (void)siu_read(port, UART_IIR);
442 (void)siu_read(port, UART_MSR);
444 if (siu_read(port, UART_LSR) == 0xff)
447 retval = request_irq(port->irq, siu_interrupt, 0, siu_type_name(port), port);
451 if (port->type == PORT_VR41XX_DSIU)
454 siu_write(port, UART_LCR, UART_LCR_WLEN8);
456 spin_lock_irq(&port->lock);
457 siu_set_mctrl(port, port->mctrl);
458 spin_unlock_irq(&port->lock);
460 siu_write(port, UART_IER, UART_IER_RLSI | UART_IER_RDI);
462 (void)siu_read(port, UART_LSR);
463 (void)siu_read(port, UART_RX);
464 (void)siu_read(port, UART_IIR);
465 (void)siu_read(port, UART_MSR);
470 static void siu_shutdown(struct uart_port *port)
475 siu_write(port, UART_IER, 0);
477 spin_lock_irqsave(&port->lock, flags);
479 port->mctrl &= ~TIOCM_OUT2;
480 siu_set_mctrl(port, port->mctrl);
482 spin_unlock_irqrestore(&port->lock, flags);
484 lcr = siu_read(port, UART_LCR);
486 siu_write(port, UART_LCR, lcr);
488 siu_clear_fifo(port);
490 (void)siu_read(port, UART_RX);
492 if (port->type == PORT_VR41XX_DSIU)
495 free_irq(port->irq, port);
498 static void siu_set_termios(struct uart_port *port, struct ktermios *new,
531 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
532 quot = uart_get_divisor(port, baud);
536 spin_lock_irqsave(&port->lock, flags);
538 uart_update_timeout(port, c_cflag, baud);
542 port->read_status_mask = UART_LSR_THRE | UART_LSR_OE | UART_LSR_DR;
544 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
546 port->read_status_mask |= UART_LSR_BI;
548 port->ignore_status_mask = 0;
550 port->ignore_status_mask |= UART_LSR_FE | UART_LSR_PE;
552 port->ignore_status_mask |= UART_LSR_BI;
554 port->ignore_status_mask |= UART_LSR_OE;
558 port->ignore_status_mask |= UART_LSR_DR;
560 ier = siu_read(port, UART_IER);
562 if (UART_ENABLE_MS(port, c_cflag))
564 siu_write(port, UART_IER, ier);
566 siu_write(port, UART_LCR, lcr | UART_LCR_DLAB);
568 siu_write(port, UART_DLL, (uint8_t)quot);
569 siu_write(port, UART_DLM, (uint8_t)(quot >> 8));
571 siu_write(port, UART_LCR, lcr);
573 siu_write(port, UART_FCR, fcr);
575 siu_set_mctrl(port, port->mctrl);
577 spin_unlock_irqrestore(&port->lock, flags);
580 static void siu_pm(struct uart_port *port, unsigned int state, unsigned int oldstate)
584 switch (port->type) {
594 switch (port->type) {
606 static const char *siu_type(struct uart_port *port)
608 return siu_type_name(port);
611 static void siu_release_port(struct uart_port *port)
615 if (port->flags & UPF_IOREMAP) {
616 iounmap(port->membase);
617 port->membase = NULL;
620 size = siu_port_size(port);
621 release_mem_region(port->mapbase, size);
624 static int siu_request_port(struct uart_port *port)
629 size = siu_port_size(port);
630 res = request_mem_region(port->mapbase, size, siu_type_name(port));
634 if (port->flags & UPF_IOREMAP) {
635 port->membase = ioremap(port->mapbase, size);
636 if (port->membase == NULL) {
645 static void siu_config_port(struct uart_port *port, int flags)
648 port->type = siu_check_type(port);
649 (void)siu_request_port(port);
653 static int siu_verify_port(struct uart_port *port, struct serial_struct *serial)
655 if (port->type != PORT_VR41XX_SIU && port->type != PORT_VR41XX_DSIU)
657 if (port->irq != serial->irq)
659 if (port->iotype != serial->io_type)
661 if (port->mapbase != (unsigned long)serial->iomem_base)
689 struct uart_port *port;
697 port = siu_uart_ports;
699 port->type = type[i];
700 if (port->type == PORT_UNKNOWN)
702 port->irq = platform_get_irq(pdev, i);
703 port->uartclk = SIU_BAUD_BASE * 16;
704 port->fifosize = 16;
705 port->regshift = 0;
706 port->iotype = UPIO_MEM;
707 port->flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
708 port->line = i;
710 port->mapbase = res->start;
711 port++;
721 static void wait_for_xmitr(struct uart_port *port)
727 lsr = siu_read(port, UART_LSR);
729 lsr_break_flag[port->line] = UART_LSR_BI;
735 if (port->flags & UPF_CONS_FLOW) {
739 msr = siu_read(port, UART_MSR);
746 static void siu_console_putchar(struct uart_port *port, int ch)
748 wait_for_xmitr(port);
749 siu_write(port, UART_TX, ch);
754 struct uart_port *port;
757 port = &siu_uart_ports[con->index];
759 ier = siu_read(port, UART_IER);
760 siu_write(port, UART_IER, 0);
762 uart_console_write(port, s, count, siu_console_putchar);
764 wait_for_xmitr(port);
765 siu_write(port, UART_IER, ier);
770 struct uart_port *port;
779 port = &siu_uart_ports[con->index];
780 if (port->membase == NULL) {
781 if (port->mapbase == 0)
783 port->membase = ioremap(port->mapbase, siu_port_size(port));
786 if (port->type == PORT_VR41XX_SIU)
792 return uart_set_options(port, con, baud, parity, bits, flow);
809 struct uart_port *port;
813 port = &siu_uart_ports[i];
814 port->ops = &siu_uart_ops;
824 void __init vr41xx_siu_early_setup(struct uart_port *port)
826 if (port->type == PORT_UNKNOWN)
829 siu_uart_ports[port->line].line = port->line;
830 siu_uart_ports[port->line].type = port->type;
831 siu_uart_ports[port->line].uartclk = SIU_BAUD_BASE * 16;
832 siu_uart_ports[port->line].mapbase = port->mapbase;
833 siu_uart_ports[port->line].ops = &siu_uart_ops;
852 struct uart_port *port;
865 port = &siu_uart_ports[i];
866 port->ops = &siu_uart_ops;
867 port->dev = &dev->dev;
868 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_VR41XX_CONSOLE);
870 retval = uart_add_one_port(&siu_uart_driver, port);
872 port->dev = NULL;
887 struct uart_port *port;
891 port = &siu_uart_ports[i];
892 if (port->dev == &dev->dev) {
893 uart_remove_one_port(&siu_uart_driver, port);
894 port->dev = NULL;
905 struct uart_port *port;
909 port = &siu_uart_ports[i];
910 if ((port->type == PORT_VR41XX_SIU ||
911 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
912 uart_suspend_port(&siu_uart_driver, port);
921 struct uart_port *port;
925 port = &siu_uart_ports[i];
926 if ((port->type == PORT_VR41XX_SIU ||
927 port->type == PORT_VR41XX_DSIU) && port->dev == &dev->dev)
928 uart_resume_port(&siu_uart_driver, port);