Lines Matching refs:up
104 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
106 offset <<= up->port.regshift;
108 switch (up->port.iotype) {
110 outb(up->port.hub6 - 1 + offset, up->port.iobase);
111 return inb(up->port.iobase + 1);
114 return readb(up->port.membase + offset);
117 return inb(up->port.iobase + offset);
121 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
135 offset <<= up->port.regshift;
137 switch (up->port.iotype) {
139 outb(up->port.hub6 - 1 + offset, up->port.iobase);
140 outb(value, up->port.iobase + 1);
144 writeb(value, up->port.membase + offset);
148 outb(value, up->port.iobase + offset);
158 #define serial_inp(up, offset) serial_in(up, offset)
159 #define serial_outp(up, offset, value) serial_out(up, offset, value)
165 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
167 serial_out(up, UART_SCR, offset);
168 serial_out(up, UART_ICR, value);
172 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
176 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
177 serial_out(up, UART_SCR, offset);
178 value = serial_in(up, UART_ICR);
179 serial_icr_write(up, UART_ACR, up->acr);
190 static int __enable_rsa(struct uart_sunsu_port *up)
195 mode = serial_inp(up, UART_RSA_MSR);
199 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
200 mode = serial_inp(up, UART_RSA_MSR);
205 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
210 static void enable_rsa(struct uart_sunsu_port *up)
212 if (up->port.type == PORT_RSA) {
213 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
214 spin_lock_irq(&up->port.lock);
215 __enable_rsa(up);
216 spin_unlock_irq(&up->port.lock);
218 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
219 serial_outp(up, UART_RSA_FRR, 0);
229 static void disable_rsa(struct uart_sunsu_port *up)
234 if (up->port.type == PORT_RSA &&
235 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
236 spin_lock_irq(&up->port.lock);
238 mode = serial_inp(up, UART_RSA_MSR);
242 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
243 mode = serial_inp(up, UART_RSA_MSR);
248 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
249 spin_unlock_irq(&up->port.lock);
264 struct uart_sunsu_port *up =
267 __stop_tx(up);
272 if (up->port.type == PORT_16C950) {
273 up->acr |= UART_ACR_TXDIS;
274 serial_icr_write(up, UART_ACR, up->acr);
280 struct uart_sunsu_port *up =
283 if (!(up->ier & UART_IER_THRI)) {
284 up->ier |= UART_IER_THRI;
285 serial_out(up, UART_IER, up->ier);
291 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
292 up->acr &= ~UART_ACR_TXDIS;
293 serial_icr_write(up, UART_ACR, up->acr);
299 struct uart_sunsu_port *up =
302 up->ier &= ~UART_IER_RLSI;
303 up->port.read_status_mask &= ~UART_LSR_DR;
304 serial_out(up, UART_IER, up->ier);
309 struct uart_sunsu_port *up =
313 spin_lock_irqsave(&up->port.lock, flags);
314 up->ier |= UART_IER_MSI;
315 serial_out(up, UART_IER, up->ier);
316 spin_unlock_irqrestore(&up->port.lock, flags);
320 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
322 struct tty_port *port = &up->port.state->port;
328 ch = serial_inp(up, UART_RX);
330 up->port.icount.rx++;
339 up->port.icount.brk++;
340 if (up->port.cons != NULL &&
341 up->port.line == up->port.cons->index)
349 if (uart_handle_break(&up->port))
352 up->port.icount.parity++;
354 up->port.icount.frame++;
356 up->port.icount.overrun++;
361 *status &= up->port.read_status_mask;
363 if (up->port.cons != NULL &&
364 up->port.line == up->port.cons->index) {
366 *status |= up->lsr_break_flag;
367 up->lsr_break_flag = 0;
377 if (uart_handle_sysrq_char(&up->port, ch))
379 if ((*status & up->port.ignore_status_mask) == 0)
389 *status = serial_inp(up, UART_LSR);
396 static void transmit_chars(struct uart_sunsu_port *up)
398 struct circ_buf *xmit = &up->port.state->xmit;
401 if (up->port.x_char) {
402 serial_outp(up, UART_TX, up->port.x_char);
403 up->port.icount.tx++;
404 up->port.x_char = 0;
407 if (uart_tx_stopped(&up->port)) {
408 sunsu_stop_tx(&up->port);
412 __stop_tx(up);
416 count = up->port.fifosize;
418 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
420 up->port.icount.tx++;
426 uart_write_wakeup(&up->port);
429 __stop_tx(up);
432 static void check_modem_status(struct uart_sunsu_port *up)
436 status = serial_in(up, UART_MSR);
442 up->port.icount.rng++;
444 up->port.icount.dsr++;
446 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
448 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
450 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
455 struct uart_sunsu_port *up = dev_id;
459 spin_lock_irqsave(&up->port.lock, flags);
462 status = serial_inp(up, UART_LSR);
464 receive_chars(up, &status);
465 check_modem_status(up);
467 transmit_chars(up);
469 spin_unlock_irqrestore(&up->port.lock, flags);
471 tty_flip_buffer_push(&up->port.state->port);
473 spin_lock_irqsave(&up->port.lock, flags);
475 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
477 spin_unlock_irqrestore(&up->port.lock, flags);
488 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
490 unsigned int cur_cflag = up->cflag;
493 up->cflag &= ~CBAUD;
494 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
496 quot = up->port.uartclk / (16 * new_baud);
498 sunsu_change_speed(&up->port, up->cflag, 0, quot);
501 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
504 unsigned char ch = serial_inp(up, UART_RX);
507 if (up->su_type == SU_PORT_KBD) {
509 serio_interrupt(&up->serio, ch, 0);
511 } else if (up->su_type == SU_PORT_MS) {
516 sunsu_change_mouse_baud(up);
523 serio_interrupt(&up->serio, ch, 0);
528 } while (serial_in(up, UART_LSR) & UART_LSR_DR);
533 struct uart_sunsu_port *up = dev_id;
535 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
536 unsigned char status = serial_inp(up, UART_LSR);
539 receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
547 struct uart_sunsu_port *up =
552 spin_lock_irqsave(&up->port.lock, flags);
553 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
554 spin_unlock_irqrestore(&up->port.lock, flags);
561 struct uart_sunsu_port *up =
566 status = serial_in(up, UART_MSR);
582 struct uart_sunsu_port *up =
597 serial_out(up, UART_MCR, mcr);
602 struct uart_sunsu_port *up =
606 spin_lock_irqsave(&up->port.lock, flags);
608 up->lcr |= UART_LCR_SBC;
610 up->lcr &= ~UART_LCR_SBC;
611 serial_out(up, UART_LCR, up->lcr);
612 spin_unlock_irqrestore(&up->port.lock, flags);
617 struct uart_sunsu_port *up =
622 if (up->port.type == PORT_16C950) {
623 /* Wake up and initialize UART */
624 up->acr = 0;
625 serial_outp(up, UART_LCR, 0xBF);
626 serial_outp(up, UART_EFR, UART_EFR_ECB);
627 serial_outp(up, UART_IER, 0);
628 serial_outp(up, UART_LCR, 0);
629 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
630 serial_outp(up, UART_LCR, 0xBF);
631 serial_outp(up, UART_EFR, UART_EFR_ECB);
632 serial_outp(up, UART_LCR, 0);
637 * If this is an RSA port, see if we can kick it up to the
640 enable_rsa(up);
647 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
648 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
649 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
651 serial_outp(up, UART_FCR, 0);
657 (void) serial_inp(up, UART_LSR);
658 (void) serial_inp(up, UART_RX);
659 (void) serial_inp(up, UART_IIR);
660 (void) serial_inp(up, UART_MSR);
667 if (!(up->port.flags & UPF_BUGGY_UART) &&
668 (serial_inp(up, UART_LSR) == 0xff)) {
669 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
673 if (up->su_type != SU_PORT_PORT) {
674 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
675 IRQF_SHARED, su_typev[up->su_type], up);
677 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
678 IRQF_SHARED, su_typev[up->su_type], up);
681 printk("su: Cannot register IRQ %d\n", up->port.irq);
688 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
690 spin_lock_irqsave(&up->port.lock, flags);
692 up->port.mctrl |= TIOCM_OUT2;
694 sunsu_set_mctrl(&up->port, up->port.mctrl);
695 spin_unlock_irqrestore(&up->port.lock, flags);
702 up->ier = UART_IER_RLSI | UART_IER_RDI;
703 serial_outp(up, UART_IER, up->ier);
705 if (up->port.flags & UPF_FOURPORT) {
710 icp = (up->port.iobase & 0xfe0) | 0x01f;
718 (void) serial_inp(up, UART_LSR);
719 (void) serial_inp(up, UART_RX);
720 (void) serial_inp(up, UART_IIR);
721 (void) serial_inp(up, UART_MSR);
728 struct uart_sunsu_port *up =
735 up->ier = 0;
736 serial_outp(up, UART_IER, 0);
738 spin_lock_irqsave(&up->port.lock, flags);
739 if (up->port.flags & UPF_FOURPORT) {
741 inb((up->port.iobase & 0xfe0) | 0x1f);
742 up->port.mctrl |= TIOCM_OUT1;
744 up->port.mctrl &= ~TIOCM_OUT2;
746 sunsu_set_mctrl(&up->port, up->port.mctrl);
747 spin_unlock_irqrestore(&up->port.lock, flags);
752 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
753 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
756 serial_outp(up, UART_FCR, 0);
762 disable_rsa(up);
768 (void) serial_in(up, UART_RX);
770 free_irq(up->port.irq, up);
777 struct uart_sunsu_port *up =
814 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
815 up->rev == 0x5201)
818 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
819 if ((up->port.uartclk / quot) < (2400 * 16))
822 else if (up->port.type == PORT_RSA)
828 if (up->port.type == PORT_16750)
835 spin_lock_irqsave(&up->port.lock, flags);
842 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
844 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
846 up->port.read_status_mask |= UART_LSR_BI;
851 up->port.ignore_status_mask = 0;
853 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
855 up->port.ignore_status_mask |= UART_LSR_BI;
861 up->port.ignore_status_mask |= UART_LSR_OE;
868 up->port.ignore_status_mask |= UART_LSR_DR;
873 up->ier &= ~UART_IER_MSI;
874 if (UART_ENABLE_MS(&up->port, cflag))
875 up->ier |= UART_IER_MSI;
877 serial_out(up, UART_IER, up->ier);
879 if (uart_config[up->port.type].flags & UART_STARTECH) {
880 serial_outp(up, UART_LCR, 0xBF);
881 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
883 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
884 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
885 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
886 if (up->port.type == PORT_16750)
887 serial_outp(up, UART_FCR, fcr); /* set fcr */
888 serial_outp(up, UART_LCR, cval); /* reset DLAB */
889 up->lcr = cval; /* Save LCR */
890 if (up->port.type != PORT_16750) {
893 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
895 serial_outp(up, UART_FCR, fcr); /* set fcr */
898 up->cflag = cflag;
900 spin_unlock_irqrestore(&up->port.lock, flags);
929 struct uart_sunsu_port *up =
938 port->type = up->type_probed; /* XXX */
988 struct uart_sunsu_port *up = serio->port_data;
995 lsr = serial_in(up, UART_LSR);
999 serial_out(up, UART_TX, ch);
1008 struct uart_sunsu_port *up = serio->port_data;
1013 if (!up->serio_open) {
1014 up->serio_open = 1;
1025 struct uart_sunsu_port *up = serio->port_data;
1029 up->serio_open = 0;
1035 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1041 if (up->su_type == SU_PORT_NONE)
1044 up->type_probed = PORT_UNKNOWN;
1045 up->port.iotype = UPIO_MEM;
1047 spin_lock_irqsave(&up->port.lock, flags);
1049 if (!(up->port.flags & UPF_BUGGY_UART)) {
1059 scratch = serial_inp(up, UART_IER);
1060 serial_outp(up, UART_IER, 0);
1064 scratch2 = serial_inp(up, UART_IER);
1065 serial_outp(up, UART_IER, 0x0f);
1069 scratch3 = serial_inp(up, UART_IER);
1070 serial_outp(up, UART_IER, scratch);
1075 save_mcr = serial_in(up, UART_MCR);
1076 save_lcr = serial_in(up, UART_LCR);
1087 if (!(up->port.flags & UPF_SKIP_TEST)) {
1088 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1089 status1 = serial_inp(up, UART_MSR) & 0xF0;
1090 serial_outp(up, UART_MCR, save_mcr);
1094 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
1095 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
1096 serial_outp(up, UART_LCR, 0);
1097 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1098 scratch = serial_in(up, UART_IIR) >> 6;
1101 up->port.type = PORT_16450;
1104 up->port.type = PORT_UNKNOWN;
1107 up->port.type = PORT_16550;
1110 up->port.type = PORT_16550A;
1113 if (up->port.type == PORT_16550A) {
1115 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1116 if (serial_in(up, UART_EFR) == 0) {
1117 up->port.type = PORT_16650;
1119 serial_outp(up, UART_LCR, 0xBF);
1120 if (serial_in(up, UART_EFR) == 0)
1121 up->port.type = PORT_16650V2;
1124 if (up->port.type == PORT_16550A) {
1126 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1127 serial_outp(up, UART_FCR,
1129 scratch = serial_in(up, UART_IIR) >> 5;
1137 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1138 serial_outp(up, UART_LCR, 0);
1139 serial_outp(up, UART_FCR,
1141 scratch = serial_in(up, UART_IIR) >> 5;
1143 up->port.type = PORT_16750;
1145 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1147 serial_outp(up, UART_LCR, save_lcr);
1148 if (up->port.type == PORT_16450) {
1149 scratch = serial_in(up, UART_SCR);
1150 serial_outp(up, UART_SCR, 0xa5);
1151 status1 = serial_in(up, UART_SCR);
1152 serial_outp(up, UART_SCR, 0x5a);
1153 status2 = serial_in(up, UART_SCR);
1154 serial_outp(up, UART_SCR, scratch);
1157 up->port.type = PORT_8250;
1160 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1162 if (up->port.type == PORT_UNKNOWN)
1164 up->type_probed = up->port.type; /* XXX */
1170 if (up->port.type == PORT_RSA)
1171 serial_outp(up, UART_RSA_FRR, 0);
1173 serial_outp(up, UART_MCR, save_mcr);
1174 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1177 serial_outp(up, UART_FCR, 0);
1178 (void)serial_in(up, UART_RX);
1179 serial_outp(up, UART_IER, 0);
1182 spin_unlock_irqrestore(&up->port.lock, flags);
1192 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1199 if (up->su_type == SU_PORT_KBD) {
1200 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1203 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1206 quot = up->port.uartclk / (16 * baud);
1208 sunsu_autoconfig(up);
1209 if (up->port.type == PORT_UNKNOWN)
1213 up->port.dev->of_node,
1214 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1215 (unsigned long long) up->port.mapbase,
1216 up->port.irq);
1219 serio = &up->serio;
1220 serio->port_data = up;
1223 if (up->su_type == SU_PORT_KBD) {
1232 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1238 serio->dev.parent = up->port.dev;
1243 sunsu_change_speed(&up->port, up->cflag, 0, quot);
1245 sunsu_startup(&up->port);
1262 static void wait_for_xmitr(struct uart_sunsu_port *up)
1266 /* Wait up to 10ms for the character(s) to be sent. */
1268 status = serial_in(up, UART_LSR);
1271 up->lsr_break_flag = UART_LSR_BI;
1278 /* Wait up to 1s for flow control if necessary */
1279 if (up->port.flags & UPF_CONS_FLOW) {
1282 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1289 struct uart_sunsu_port *up =
1292 wait_for_xmitr(up);
1293 serial_out(up, UART_TX, ch);
1303 struct uart_sunsu_port *up = &sunsu_ports[co->index];
1308 if (up->port.sysrq || oops_in_progress)
1309 locked = spin_trylock_irqsave(&up->port.lock, flags);
1311 spin_lock_irqsave(&up->port.lock, flags);
1316 ier = serial_in(up, UART_IER);
1317 serial_out(up, UART_IER, 0);
1319 uart_console_write(&up->port, s, count, sunsu_console_putchar);
1325 wait_for_xmitr(up);
1326 serial_out(up, UART_IER, ier);
1329 spin_unlock_irqrestore(&up->port.lock, flags);
1435 struct uart_sunsu_port *up;
1445 up = &sunsu_ports[nr_inst];
1447 up = kzalloc(sizeof(*up), GFP_KERNEL);
1448 if (!up)
1452 up->port.line = nr_inst;
1454 spin_lock_init(&up->port.lock);
1456 up->su_type = type;
1459 up->port.mapbase = rp->start;
1460 up->reg_size = resource_size(rp);
1461 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1462 if (!up->port.membase) {
1464 kfree(up);
1468 up->port.irq = op->archdata.irqs[0];
1470 up->port.dev = &op->dev;
1472 up->port.type = PORT_UNKNOWN;
1473 up->port.uartclk = (SU_BASE_BAUD * 16);
1474 up->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SUNSU_CONSOLE);
1477 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1478 err = sunsu_kbd_ms_init(up);
1481 up->port.membase, up->reg_size);
1482 kfree(up);
1485 platform_set_drvdata(op, up);
1492 up->port.flags |= UPF_BOOT_AUTOCONF;
1494 sunsu_autoconfig(up);
1497 if (up->port.type == PORT_UNKNOWN)
1500 up->port.ops = &sunsu_pops;
1508 &sunsu_reg, up->port.line,
1510 err = uart_add_one_port(&sunsu_reg, &up->port);
1514 platform_set_drvdata(op, up);
1521 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1522 kfree(up);
1528 struct uart_sunsu_port *up = platform_get_drvdata(op);
1531 if (up->su_type == SU_PORT_MS ||
1532 up->su_type == SU_PORT_KBD)
1537 serio_unregister_port(&up->serio);
1539 } else if (up->port.type != PORT_UNKNOWN)
1540 uart_remove_one_port(&sunsu_reg, &up->port);
1542 if (up->port.membase)
1543 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1546 kfree(up);