Lines Matching refs:ssp
229 * @ssp: pointer to a struct sifive_serial_port record
232 * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
236 static void __ssp_writel(u32 v, u16 offs, struct sifive_serial_port *ssp)
238 __ssp_early_writel(v, offs, &ssp->port);
243 * @ssp: pointer to a struct sifive_serial_port record
247 * IP block base, given a pointer @ssp to a struct sifive_serial_port record.
253 static u32 __ssp_readl(struct sifive_serial_port *ssp, u16 offs)
255 return __ssp_early_readl(&ssp->port, offs);
260 * @ssp: pointer to a struct sifive_serial_port
269 static int sifive_serial_is_txfifo_full(struct sifive_serial_port *ssp)
271 return __ssp_readl(ssp, SIFIVE_SERIAL_TXDATA_OFFS) &
277 * @ssp: pointer to a struct sifive_serial_port
280 * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
286 static void __ssp_transmit_char(struct sifive_serial_port *ssp, int ch)
288 __ssp_writel(ch, SIFIVE_SERIAL_TXDATA_OFFS, ssp);
293 * @ssp: pointer to a struct sifive_serial_port
298 * Context: Any context. Expects @ssp->port.lock to be held by caller.
300 static void __ssp_transmit_chars(struct sifive_serial_port *ssp)
302 struct circ_buf *xmit = &ssp->port.state->xmit;
305 if (ssp->port.x_char) {
306 __ssp_transmit_char(ssp, ssp->port.x_char);
307 ssp->port.icount.tx++;
308 ssp->port.x_char = 0;
311 if (uart_circ_empty(xmit) || uart_tx_stopped(&ssp->port)) {
312 sifive_serial_stop_tx(&ssp->port);
317 __ssp_transmit_char(ssp, xmit->buf[xmit->tail]);
319 ssp->port.icount.tx++;
325 uart_write_wakeup(&ssp->port);
328 sifive_serial_stop_tx(&ssp->port);
333 * @ssp: pointer to a struct sifive_serial_port
336 * on the SiFive UART referred to by @ssp.
338 static void __ssp_enable_txwm(struct sifive_serial_port *ssp)
340 if (ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK)
343 ssp->ier |= SIFIVE_SERIAL_IE_TXWM_MASK;
344 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
349 * @ssp: pointer to a struct sifive_serial_port
352 * on the SiFive UART referred to by @ssp.
354 static void __ssp_enable_rxwm(struct sifive_serial_port *ssp)
356 if (ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK)
359 ssp->ier |= SIFIVE_SERIAL_IE_RXWM_MASK;
360 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
365 * @ssp: pointer to a struct sifive_serial_port
368 * on the UART referred to by @ssp.
370 static void __ssp_disable_txwm(struct sifive_serial_port *ssp)
372 if (!(ssp->ier & SIFIVE_SERIAL_IE_TXWM_MASK))
375 ssp->ier &= ~SIFIVE_SERIAL_IE_TXWM_MASK;
376 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
381 * @ssp: pointer to a struct sifive_serial_port
384 * on the UART referred to by @ssp.
386 static void __ssp_disable_rxwm(struct sifive_serial_port *ssp)
388 if (!(ssp->ier & SIFIVE_SERIAL_IE_RXWM_MASK))
391 ssp->ier &= ~SIFIVE_SERIAL_IE_RXWM_MASK;
392 __ssp_writel(ssp->ier, SIFIVE_SERIAL_IE_OFFS, ssp);
397 * @ssp: pointer to a struct sifive_serial_port
401 * @ssp, and to return it. Also returns the RX FIFO empty bit in
407 static char __ssp_receive_char(struct sifive_serial_port *ssp, char *is_empty)
412 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXDATA_OFFS);
428 * @ssp: pointer to a struct sifive_serial_port
431 * to by @ssp and pass them up to the Linux serial layer.
433 * Context: Expects ssp->port.lock to be held by caller.
435 static void __ssp_receive_chars(struct sifive_serial_port *ssp)
442 ch = __ssp_receive_char(ssp, &is_empty);
446 ssp->port.icount.rx++;
447 uart_insert_char(&ssp->port, 0, 0, ch, TTY_NORMAL);
450 spin_unlock(&ssp->port.lock);
451 tty_flip_buffer_push(&ssp->port.state->port);
452 spin_lock(&ssp->port.lock);
457 * @ssp: pointer to a struct sifive_serial_port
460 * and target line rate referred to by @ssp and write it into the
463 static void __ssp_update_div(struct sifive_serial_port *ssp)
467 div = DIV_ROUND_UP(ssp->clkin_rate, ssp->baud_rate) - 1;
469 __ssp_writel(div, SIFIVE_SERIAL_DIV_OFFS, ssp);
474 * @ssp: pointer to a struct sifive_serial_port
478 * SiFive UART described by @ssp and program it into the UART. There may
482 static void __ssp_update_baud_rate(struct sifive_serial_port *ssp,
485 if (ssp->baud_rate == rate)
488 ssp->baud_rate = rate;
489 __ssp_update_div(ssp);
494 * @ssp: pointer to a struct sifive_serial_port
497 * Program the SiFive UART referred to by @ssp to use @nstop stop bits.
499 static void __ssp_set_stop_bits(struct sifive_serial_port *ssp, char nstop)
508 v = __ssp_readl(ssp, SIFIVE_SERIAL_TXCTRL_OFFS);
511 __ssp_writel(v, SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
516 * @ssp: pointer to a struct sifive_serial_port
518 * Delay while the UART TX FIFO referred to by @ssp is marked as full.
522 static void __maybe_unused __ssp_wait_for_xmitr(struct sifive_serial_port *ssp)
524 while (sifive_serial_is_txfifo_full(ssp))
534 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
536 __ssp_disable_txwm(ssp);
541 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
543 __ssp_disable_rxwm(ssp);
548 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
550 __ssp_enable_txwm(ssp);
555 struct sifive_serial_port *ssp = dev_id;
558 spin_lock(&ssp->port.lock);
560 ip = __ssp_readl(ssp, SIFIVE_SERIAL_IP_OFFS);
562 spin_unlock(&ssp->port.lock);
567 __ssp_receive_chars(ssp);
569 __ssp_transmit_chars(ssp);
571 spin_unlock(&ssp->port.lock);
598 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
600 __ssp_enable_rxwm(ssp);
607 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
609 __ssp_disable_rxwm(ssp);
610 __ssp_disable_txwm(ssp);
630 struct sifive_serial_port *ssp = notifier_to_sifive_serial_port(nb);
639 __ssp_wait_for_xmitr(ssp);
649 udelay(DIV_ROUND_UP(12 * 1000 * 1000, ssp->baud_rate));
652 if (event == POST_RATE_CHANGE && ssp->clkin_rate != cnd->new_rate) {
653 ssp->clkin_rate = cnd->new_rate;
654 __ssp_update_div(ssp);
664 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
671 dev_err_once(ssp->port.dev, "only 8-bit words supported\n");
676 dev_err_once(ssp->port.dev, "parity checking not supported\n");
678 dev_err_once(ssp->port.dev, "BREAK detection not supported\n");
683 __ssp_set_stop_bits(ssp, nstop);
686 rate = uart_get_baud_rate(port, termios, old, 0, ssp->clkin_rate / 16);
687 __ssp_update_baud_rate(ssp, rate);
689 spin_lock_irqsave(&ssp->port.lock, flags);
694 ssp->port.read_status_mask = 0;
697 v = __ssp_readl(ssp, SIFIVE_SERIAL_RXCTRL_OFFS);
704 __ssp_writel(v, SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
706 spin_unlock_irqrestore(&ssp->port.lock, flags);
720 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
722 ssp->port.type = PORT_SIFIVE_V0;
739 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
742 ch = __ssp_receive_char(ssp, &is_empty);
752 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
754 __ssp_wait_for_xmitr(ssp);
755 __ssp_transmit_char(ssp, c);
810 struct sifive_serial_port *ssp = port_to_sifive_serial_port(port);
812 __ssp_wait_for_xmitr(ssp);
813 __ssp_transmit_char(ssp, ch);
819 struct sifive_serial_port *ssp = sifive_serial_console_ports[co->index];
824 if (!ssp)
828 if (ssp->port.sysrq)
831 locked = spin_trylock(&ssp->port.lock);
833 spin_lock(&ssp->port.lock);
835 ier = __ssp_readl(ssp, SIFIVE_SERIAL_IE_OFFS);
836 __ssp_writel(0, SIFIVE_SERIAL_IE_OFFS, ssp);
838 uart_console_write(&ssp->port, s, count, sifive_serial_console_putchar);
840 __ssp_writel(ier, SIFIVE_SERIAL_IE_OFFS, ssp);
843 spin_unlock(&ssp->port.lock);
849 struct sifive_serial_port *ssp;
858 ssp = sifive_serial_console_ports[co->index];
859 if (!ssp)
865 return uart_set_options(&ssp->port, co, baud, parity, bits, flow);
888 static void __ssp_add_console_port(struct sifive_serial_port *ssp)
890 sifive_serial_console_ports[ssp->port.line] = ssp;
893 static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
895 sifive_serial_console_ports[ssp->port.line] = 0;
904 static void __ssp_add_console_port(struct sifive_serial_port *ssp)
906 static void __ssp_remove_console_port(struct sifive_serial_port *ssp)
943 struct sifive_serial_port *ssp;
979 ssp = devm_kzalloc(&pdev->dev, sizeof(*ssp), GFP_KERNEL);
980 if (!ssp)
983 ssp->port.dev = &pdev->dev;
984 ssp->port.type = PORT_SIFIVE_V0;
985 ssp->port.iotype = UPIO_MEM;
986 ssp->port.irq = irq;
987 ssp->port.fifosize = SIFIVE_TX_FIFO_DEPTH;
988 ssp->port.ops = &sifive_serial_uops;
989 ssp->port.line = id;
990 ssp->port.mapbase = mem->start;
991 ssp->port.membase = base;
992 ssp->dev = &pdev->dev;
993 ssp->clk = clk;
994 ssp->clk_notifier.notifier_call = sifive_serial_clk_notifier;
996 r = clk_notifier_register(ssp->clk, &ssp->clk_notifier);
1004 ssp->clkin_rate = clk_get_rate(ssp->clk);
1005 ssp->baud_rate = SIFIVE_DEFAULT_BAUD_RATE;
1006 ssp->port.uartclk = ssp->clkin_rate;
1007 __ssp_update_div(ssp);
1009 platform_set_drvdata(pdev, ssp);
1014 SIFIVE_SERIAL_TXCTRL_OFFS, ssp);
1019 SIFIVE_SERIAL_RXCTRL_OFFS, ssp);
1021 r = request_irq(ssp->port.irq, sifive_serial_irq, ssp->port.irqflags,
1022 dev_name(&pdev->dev), ssp);
1028 __ssp_add_console_port(ssp);
1030 r = uart_add_one_port(&sifive_serial_uart_driver, &ssp->port);
1039 __ssp_remove_console_port(ssp);
1040 free_irq(ssp->port.irq, ssp);
1042 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);
1049 struct sifive_serial_port *ssp = platform_get_drvdata(dev);
1051 __ssp_remove_console_port(ssp);
1052 uart_remove_one_port(&sifive_serial_uart_driver, &ssp->port);
1053 free_irq(ssp->port.irq, ssp);
1054 clk_notifier_unregister(ssp->clk, &ssp->clk_notifier);