Lines Matching refs:FIFO
132 /* SIFIVE_TX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
135 /* SIFIVE_RX_FIFO_DEPTH: depth of the TX FIFO (in bytes) */
139 #error Driver does not support configurations with different TX, RX FIFO sizes
262 * Read the transmit FIFO "full" bit, returning a non-zero value if the
263 * TX FIFO is full, or zero if space remains. Intended to be used to prevent
264 * writes to the TX FIFO when it's full.
266 * Returns: SIFIVE_SERIAL_TXDATA_FULL_MASK (non-zero) if the transmit FIFO
276 * __ssp_transmit_char() - enqueue a byte to transmit onto the TX FIFO
280 * Enqueue a byte @ch onto the transmit FIFO, given a pointer @ssp to the
292 * __ssp_transmit_chars() - enqueue multiple bytes onto the TX FIFO
295 * Transfer up to a TX FIFO size's worth of characters from the Linux serial
296 * transmit buffer to the SiFive UART TX FIFO.
335 * Enable interrupt generation when the transmit FIFO watermark is reached
351 * Enable interrupt generation when the receive FIFO watermark is reached
367 * Disable interrupt generation when the transmit FIFO watermark is reached
383 * Disable interrupt generation when the receive FIFO watermark is reached
398 * @is_empty: char pointer to return whether the RX FIFO is empty
400 * Try to read a byte from the SiFive UART RX FIFO, referenced by
401 * @ssp, and to return it. Also returns the RX FIFO empty bit in
405 * Returns: the byte read from the UART RX FIFO.
430 * Receive up to an RX FIFO's worth of bytes from the SiFive UART referred
515 * __ssp_wait_for_xmitr() - wait for an empty slot on the TX FIFO
518 * Delay while the UART TX FIFO referred to by @ssp is marked as full.
636 * left in the TX queue -- in other words, when the TX FIFO is
641 * On the cycle the TX FIFO goes empty there is still a full