Lines Matching defs:uport
103 struct uart_port uport;
155 return readl(tup->uport.membase + (reg << tup->uport.regshift));
161 writel(val, tup->uport.membase + (reg << tup->uport.regshift));
166 return container_of(u, struct tegra_uart_port, uport);
368 dev_err(tup->uport.dev,
396 dev_err(tup->uport.dev,
410 spin_lock_irqsave(&tup->uport.lock, flags);
423 spin_unlock_irqrestore(&tup->uport.lock, flags);
441 tup->uport.icount.overrun++;
442 dev_dbg(tup->uport.dev, "Got overrun errors\n");
446 tup->uport.icount.parity++;
447 dev_dbg(tup->uport.dev, "Got Parity errors\n");
450 tup->uport.icount.frame++;
451 dev_dbg(tup->uport.dev, "Got frame errors\n");
459 if (tup->uport.ignore_status_mask & UART_LSR_BI)
462 tup->uport.icount.brk++;
463 dev_dbg(tup->uport.dev, "Got Break\n");
465 uart_insert_char(&tup->uport, lsr, UART_LSR_OE, 0, flag);
483 struct circ_buf *xmit = &tup->uport.state->xmit;
495 tup->uport.icount.tx++;
514 struct circ_buf *xmit = &tup->uport.state->xmit;
522 spin_lock_irqsave(&tup->uport.lock, flags);
523 uart_xmit_advance(&tup->uport, count);
526 uart_write_wakeup(&tup->uport);
528 spin_unlock_irqrestore(&tup->uport.lock, flags);
534 struct circ_buf *xmit = &tup->uport.state->xmit;
540 dma_sync_single_for_device(tup->uport.dev, tx_phys_addr,
547 dev_err(tup->uport.dev, "Not able to get desc for Tx\n");
564 struct circ_buf *xmit = &tup->uport.state->xmit;
622 uart_xmit_advance(&tup->uport, count);
628 struct circ_buf *xmit = &tup->uport.state->xmit;
633 uart_write_wakeup(&tup->uport);
654 tup->uport.icount.rx++;
656 if (uart_handle_sysrq_char(&tup->uport, ch))
659 if (tup->uport.ignore_status_mask & UART_LSR_DR)
676 tup->uport.icount.rx += count;
678 if (tup->uport.ignore_status_mask & UART_LSR_DR)
681 dma_sync_single_for_cpu(tup->uport.dev, tup->rx_dma_buf_phys,
687 dev_err(tup->uport.dev, "RxData copy to tty layer failed\n");
689 dma_sync_single_for_device(tup->uport.dev, tup->rx_dma_buf_phys,
695 struct tty_struct *tty = tty_port_tty_get(&tup->uport.state->port);
696 struct tty_port *port = &tup->uport.state->port;
708 struct tty_port *port = &tup->uport.state->port;
723 struct uart_port *u = &tup->uport;
733 dev_dbg(tup->uport.dev, "RX DMA is in progress\n");
793 dev_err(tup->uport.dev, "Not able to get desc for Rx\n");
816 tup->uport.icount.rng++;
818 tup->uport.icount.dsr++;
821 uart_handle_dcd_change(&tup->uport, msr & UART_MSR_DCD);
824 uart_handle_cts_change(&tup->uport, msr & UART_MSR_CTS);
830 struct uart_port *u = &tup->uport;
907 struct tty_port *port = &tup->uport.state->port;
935 unsigned long fifo_empty_time = tup->uport.fifosize * char_time;
949 dev_err(tup->uport.dev,
962 dev_err(tup->uport.dev,
970 spin_lock_irqsave(&tup->uport.lock, flags);
974 spin_unlock_irqrestore(&tup->uport.lock, flags);
999 dev_err(tup->uport.dev, "could not enable clk\n");
1049 dev_err(tup->uport.dev,
1070 dev_err(tup->uport.dev, "Failed to set baud rate\n");
1115 dma_free_coherent(tup->uport.dev, TEGRA_UART_RX_DMA_BUFFER_SIZE,
1123 dma_unmap_single(tup->uport.dev, tup->tx_dma_buf_phys,
1140 dma_chan = dma_request_chan(tup->uport.dev, dma_to_memory ? "rx" : "tx");
1143 dev_err(tup->uport.dev,
1149 dma_buf = dma_alloc_coherent(tup->uport.dev,
1153 dev_err(tup->uport.dev,
1158 dma_sync_single_for_device(tup->uport.dev, dma_phys,
1161 dma_sconfig.src_addr = tup->uport.mapbase;
1168 dma_phys = dma_map_single(tup->uport.dev,
1169 tup->uport.state->xmit.buf, UART_XMIT_SIZE,
1171 if (dma_mapping_error(tup->uport.dev, dma_phys)) {
1172 dev_err(tup->uport.dev, "dma_map_single tx failed\n");
1176 dma_buf = tup->uport.state->xmit.buf;
1177 dma_sconfig.dst_addr = tup->uport.mapbase;
1187 dev_err(tup->uport.dev,
1359 dev_err(tup->uport.dev, "Failed to set baud rate\n");
1390 tup->uport.ignore_status_mask = 0;
1393 tup->uport.ignore_status_mask |= UART_LSR_DR;
1395 tup->uport.ignore_status_mask |= UART_LSR_BI;
1447 tup->uport.line = port;
1590 u = &tup->uport;
1638 struct uart_port *u = &tup->uport;
1648 struct uart_port *u = &tup->uport;
1656 struct uart_port *u = &tup->uport;