Lines Matching refs:port
314 struct uart_port port;
347 static int sc16is7xx_line(struct uart_port *port)
349 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
354 static u8 sc16is7xx_port_read(struct uart_port *port, u8 reg)
356 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
358 const u8 line = sc16is7xx_line(port);
365 static void sc16is7xx_port_write(struct uart_port *port, u8 reg, u8 val)
367 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
368 const u8 line = sc16is7xx_line(port);
373 static void sc16is7xx_fifo_read(struct uart_port *port, unsigned int rxlen)
375 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
376 const u8 line = sc16is7xx_line(port);
384 static void sc16is7xx_fifo_write(struct uart_port *port, u8 to_send)
386 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
387 const u8 line = sc16is7xx_line(port);
402 static void sc16is7xx_port_update(struct uart_port *port, u8 reg,
405 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
406 const u8 line = sc16is7xx_line(port);
425 static void sc16is7xx_power(struct uart_port *port, int on)
427 sc16is7xx_port_update(port, SC16IS7XX_IER_REG,
492 static int sc16is7xx_set_baud(struct uart_port *port, int baud)
494 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
497 unsigned long clk = port->uartclk, div = clk / 16 / baud;
519 lcr = sc16is7xx_port_read(port, SC16IS7XX_LCR_REG);
522 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
527 sc16is7xx_port_write(port, SC16IS7XX_EFR_REG,
532 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
536 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
541 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
546 sc16is7xx_port_write(port, SC16IS7XX_DLH_REG, div / 256);
547 sc16is7xx_port_write(port, SC16IS7XX_DLL_REG, div % 256);
551 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
556 static void sc16is7xx_handle_rx(struct uart_port *port, unsigned int rxlen,
559 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
564 dev_warn_ratelimited(port->dev,
566 port->line, rxlen);
567 port->icount.buf_overrun++;
575 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG);
582 s->buf[0] = sc16is7xx_port_read(port, SC16IS7XX_RHR_REG);
585 sc16is7xx_fifo_read(port, rxlen);
591 port->icount.rx++;
596 port->icount.brk++;
597 if (uart_handle_break(port))
600 port->icount.parity++;
602 port->icount.frame++;
604 port->icount.overrun++;
606 lsr &= port->read_status_mask;
619 if (uart_handle_sysrq_char(port, ch))
622 if (lsr & port->ignore_status_mask)
625 uart_insert_char(port, lsr, SC16IS7XX_LSR_OE_BIT, ch,
631 tty_flip_buffer_push(&port->state->port);
634 static void sc16is7xx_handle_tx(struct uart_port *port)
636 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
637 struct circ_buf *xmit = &port->state->xmit;
640 if (unlikely(port->x_char)) {
641 sc16is7xx_port_write(port, SC16IS7XX_THR_REG, port->x_char);
642 port->icount.tx++;
643 port->x_char = 0;
647 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
654 txlen = sc16is7xx_port_read(port, SC16IS7XX_TXLVL_REG);
656 dev_err_ratelimited(port->dev,
664 port->icount.tx += to_send;
672 sc16is7xx_fifo_write(port, to_send);
676 uart_write_wakeup(port);
681 struct uart_port *port = &s->p[portno].port;
686 iir = sc16is7xx_port_read(port, SC16IS7XX_IIR_REG);
697 rxlen = sc16is7xx_port_read(port, SC16IS7XX_RXLVL_REG);
711 sc16is7xx_handle_rx(port, rxlen, iir);
714 sc16is7xx_handle_tx(port);
717 dev_err_ratelimited(port->dev,
719 port->line, iir);
749 struct uart_port *port = &(to_sc16is7xx_one(ws, tx_work)->port);
750 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
752 if ((port->rs485.flags & SER_RS485_ENABLED) &&
753 (port->rs485.delay_rts_before_send > 0))
754 msleep(port->rs485.delay_rts_before_send);
757 sc16is7xx_handle_tx(port);
761 static void sc16is7xx_reconf_rs485(struct uart_port *port)
766 struct serial_rs485 *rs485 = &port->rs485;
769 spin_lock_irqsave(&port->lock, irqflags);
776 spin_unlock_irqrestore(&port->lock, irqflags);
778 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG, mask, efcr);
787 spin_lock_irqsave(&one->port.lock, irqflags);
790 spin_unlock_irqrestore(&one->port.lock, irqflags);
793 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG,
795 (one->port.mctrl & TIOCM_LOOP) ?
797 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG,
799 (one->port.mctrl & TIOCM_RTS) ?
801 sc16is7xx_port_update(&one->port, SC16IS7XX_MCR_REG,
803 (one->port.mctrl & TIOCM_DTR) ?
807 sc16is7xx_port_update(&one->port, SC16IS7XX_IER_REG,
811 sc16is7xx_reconf_rs485(&one->port);
814 static void sc16is7xx_ier_clear(struct uart_port *port, u8 bit)
816 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
817 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
824 static void sc16is7xx_stop_tx(struct uart_port *port)
826 sc16is7xx_ier_clear(port, SC16IS7XX_IER_THRI_BIT);
829 static void sc16is7xx_stop_rx(struct uart_port *port)
831 sc16is7xx_ier_clear(port, SC16IS7XX_IER_RDI_BIT);
834 static void sc16is7xx_start_tx(struct uart_port *port)
836 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
837 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
842 static unsigned int sc16is7xx_tx_empty(struct uart_port *port)
846 lsr = sc16is7xx_port_read(port, SC16IS7XX_LSR_REG);
851 static unsigned int sc16is7xx_get_mctrl(struct uart_port *port)
859 static void sc16is7xx_set_mctrl(struct uart_port *port, unsigned int mctrl)
861 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
862 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
868 static void sc16is7xx_break_ctl(struct uart_port *port, int break_state)
870 sc16is7xx_port_update(port, SC16IS7XX_LCR_REG,
875 static void sc16is7xx_set_termios(struct uart_port *port,
879 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
919 port->read_status_mask = SC16IS7XX_LSR_OE_BIT;
921 port->read_status_mask |= SC16IS7XX_LSR_PE_BIT |
924 port->read_status_mask |= SC16IS7XX_LSR_BI_BIT;
927 port->ignore_status_mask = 0;
929 port->ignore_status_mask |= SC16IS7XX_LSR_BI_BIT;
931 port->ignore_status_mask |= SC16IS7XX_LSR_BRK_ERROR_MASK;
936 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
941 sc16is7xx_port_write(port, SC16IS7XX_XON1_REG, termios->c_cc[VSTART]);
942 sc16is7xx_port_write(port, SC16IS7XX_XOFF1_REG, termios->c_cc[VSTOP]);
951 sc16is7xx_port_write(port, SC16IS7XX_EFR_REG, flow);
955 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, lcr);
960 baud = uart_get_baud_rate(port, termios, old,
961 port->uartclk / 16 / 4 / 0xffff,
962 port->uartclk / 16);
965 baud = sc16is7xx_set_baud(port, baud);
968 uart_update_timeout(port, termios->c_cflag, baud);
971 static int sc16is7xx_config_rs485(struct uart_port *port,
974 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
975 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
984 dev_err(port->dev,
997 port->rs485 = *rs485;
1004 static int sc16is7xx_startup(struct uart_port *port)
1006 struct sc16is7xx_one *one = to_sc16is7xx_one(port, port);
1007 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1010 sc16is7xx_power(port, 1);
1014 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, val);
1016 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG,
1020 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG,
1026 sc16is7xx_port_write(port, SC16IS7XX_EFR_REG,
1030 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
1036 sc16is7xx_port_write(port, SC16IS7XX_TCR_REG,
1043 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8);
1047 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG,
1053 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG,
1060 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val);
1065 static void sc16is7xx_shutdown(struct uart_port *port)
1067 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1070 sc16is7xx_port_write(port, SC16IS7XX_IER_REG, 0);
1072 sc16is7xx_port_update(port, SC16IS7XX_EFCR_REG,
1078 sc16is7xx_power(port, 0);
1083 static const char *sc16is7xx_type(struct uart_port *port)
1085 struct sc16is7xx_port *s = dev_get_drvdata(port->dev);
1087 return (port->type == PORT_SC16IS7XX) ? s->devtype->name : NULL;
1090 static int sc16is7xx_request_port(struct uart_port *port)
1096 static void sc16is7xx_config_port(struct uart_port *port, int flags)
1099 port->type = PORT_SC16IS7XX;
1102 static int sc16is7xx_verify_port(struct uart_port *port,
1107 if (s->irq != port->irq)
1113 static void sc16is7xx_pm(struct uart_port *port, unsigned int state,
1116 sc16is7xx_power(port, (state == UART_PM_STATE_ON) ? 1 : 0);
1119 static void sc16is7xx_null_void(struct uart_port *port)
1148 struct uart_port *port = &s->p[0].port;
1150 val = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG);
1158 struct uart_port *port = &s->p[0].port;
1160 sc16is7xx_port_update(port, SC16IS7XX_IOSTATE_REG, BIT(offset),
1168 struct uart_port *port = &s->p[0].port;
1170 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset), 0);
1179 struct uart_port *port = &s->p[0].port;
1180 u8 state = sc16is7xx_port_read(port, SC16IS7XX_IOSTATE_REG);
1195 sc16is7xx_port_update(port, SC16IS7XX_IODIR_REG, BIT(offset),
1197 sc16is7xx_port_write(port, SC16IS7XX_IOSTATE_REG, state);
1226 /* Alloc port structure */
1229 dev_err(dev, "Error allocating port structure\n");
1274 /* Initialize port data */
1275 s->p[i].port.dev = dev;
1276 s->p[i].port.irq = irq;
1277 s->p[i].port.type = PORT_SC16IS7XX;
1278 s->p[i].port.fifosize = SC16IS7XX_FIFO_SIZE;
1279 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1280 s->p[i].port.iobase = i;
1286 s->p[i].port.membase = (void __iomem *)~0;
1287 s->p[i].port.iotype = UPIO_PORT;
1288 s->p[i].port.uartclk = freq;
1289 s->p[i].port.rs485_config = sc16is7xx_config_rs485;
1290 s->p[i].port.ops = &sc16is7xx_ops;
1291 s->p[i].port.line = sc16is7xx_alloc_line();
1292 if (s->p[i].port.line >= SC16IS7XX_MAX_DEVS) {
1298 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_IER_REG, 0);
1300 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFCR_REG,
1306 /* Register port */
1307 uart_add_one_port(&sc16is7xx_uart, &s->p[i].port);
1310 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG,
1316 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_EFR_REG,
1322 sc16is7xx_port_write(&s->p[i].port, SC16IS7XX_LCR_REG, 0x00);
1325 sc16is7xx_power(&s->p[i].port, 0);
1386 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port);
1387 clear_bit(s->p[i].port.line, &sc16is7xx_lines);
1410 uart_remove_one_port(&sc16is7xx_uart, &s->p[i].port);
1411 clear_bit(s->p[i].port.line, &sc16is7xx_lines);
1412 sc16is7xx_power(&s->p[i].port, 0);