Lines Matching refs:port
45 #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
46 #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
47 #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
48 #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
49 #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
50 #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
51 #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
53 #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
54 #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
55 #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
56 #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
57 #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
58 #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
59 #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
62 * This is the size of our serial port register set.
75 struct uart_port port;
88 status = sport->port.ops->get_mctrl(&sport->port);
97 sport->port.icount.rng++;
99 sport->port.icount.dsr++;
101 uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
103 uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
105 wake_up_interruptible(&sport->port.state->port.delta_msr_wait);
109 * This is our per-port timeout handler, for checking the
117 if (sport->port.state) {
118 spin_lock_irqsave(&sport->port.lock, flags);
120 spin_unlock_irqrestore(&sport->port.lock, flags);
129 static void sa1100_stop_tx(struct uart_port *port)
132 container_of(port, struct sa1100_port, port);
137 sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
141 * port locked and interrupts disabled
143 static void sa1100_start_tx(struct uart_port *port)
146 container_of(port, struct sa1100_port, port);
150 sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
157 static void sa1100_stop_rx(struct uart_port *port)
160 container_of(port, struct sa1100_port, port);
170 static void sa1100_enable_ms(struct uart_port *port)
173 container_of(port, struct sa1100_port, port);
190 sport->port.icount.rx++;
200 sport->port.icount.parity++;
202 sport->port.icount.frame++;
204 sport->port.icount.overrun++;
206 status &= sport->port.read_status_mask;
213 sport->port.sysrq = 0;
216 if (uart_handle_sysrq_char(&sport->port, ch))
219 uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
226 spin_unlock(&sport->port.lock);
227 tty_flip_buffer_push(&sport->port.state->port);
228 spin_lock(&sport->port.lock);
233 struct circ_buf *xmit = &sport->port.state->xmit;
235 if (sport->port.x_char) {
236 UART_PUT_CHAR(sport, sport->port.x_char);
237 sport->port.icount.tx++;
238 sport->port.x_char = 0;
248 if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
249 sa1100_stop_tx(&sport->port);
260 sport->port.icount.tx++;
266 uart_write_wakeup(&sport->port);
269 sa1100_stop_tx(&sport->port);
277 spin_lock(&sport->port.lock);
279 status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
293 sport->port.icount.brk++;
296 uart_handle_break(&sport->port);
303 status &= SM_TO_UTSR0(sport->port.read_status_mask) |
306 spin_unlock(&sport->port.lock);
314 static unsigned int sa1100_tx_empty(struct uart_port *port)
317 container_of(port, struct sa1100_port, port);
322 static unsigned int sa1100_get_mctrl(struct uart_port *port)
325 container_of(port, struct sa1100_port, port);
333 static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
336 container_of(port, struct sa1100_port, port);
344 static void sa1100_break_ctl(struct uart_port *port, int break_state)
347 container_of(port, struct sa1100_port, port);
351 spin_lock_irqsave(&sport->port.lock, flags);
358 spin_unlock_irqrestore(&sport->port.lock, flags);
361 static int sa1100_startup(struct uart_port *port)
364 container_of(port, struct sa1100_port, port);
370 retval = request_irq(sport->port.irq, sa1100_int, 0,
384 spin_lock_irq(&sport->port.lock);
385 sa1100_enable_ms(&sport->port);
386 spin_unlock_irq(&sport->port.lock);
391 static void sa1100_shutdown(struct uart_port *port)
394 container_of(port, struct sa1100_port, port);
404 free_irq(sport->port.irq, sport);
407 * Disable all interrupts, port and break condition.
413 sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
417 container_of(port, struct sa1100_port, port);
448 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
449 quot = uart_get_divisor(port, baud);
453 spin_lock_irqsave(&sport->port.lock, flags);
455 sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
456 sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
458 sport->port.read_status_mask |=
461 sport->port.read_status_mask |=
467 sport->port.ignore_status_mask = 0;
469 sport->port.ignore_status_mask |=
472 sport->port.ignore_status_mask |=
479 sport->port.ignore_status_mask |=
484 * Update the per-port timeout.
486 uart_update_timeout(port, termios->c_cflag, baud);
512 if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
513 sa1100_enable_ms(&sport->port);
515 spin_unlock_irqrestore(&sport->port.lock, flags);
518 static const char *sa1100_type(struct uart_port *port)
521 container_of(port, struct sa1100_port, port);
523 return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
527 * Release the memory region(s) being used by 'port'.
529 static void sa1100_release_port(struct uart_port *port)
532 container_of(port, struct sa1100_port, port);
534 release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
538 * Request the memory region(s) being used by 'port'.
540 static int sa1100_request_port(struct uart_port *port)
543 container_of(port, struct sa1100_port, port);
545 return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
550 * Configure/autoconfigure the port.
552 static void sa1100_config_port(struct uart_port *port, int flags)
555 container_of(port, struct sa1100_port, port);
558 sa1100_request_port(&sport->port) == 0)
559 sport->port.type = PORT_SA1100;
568 sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
571 container_of(port, struct sa1100_port, port);
576 if (sport->port.irq != ser->irq)
580 if (sport->port.uartclk / 16 != ser->baud_base)
582 if ((void *)sport->port.mapbase != ser->iomem_base)
584 if (sport->port.iobase != ser->port)
614 * port here since we have our own SIR/FIR driver (see drivers/net/irda)
617 * Which serial port this ends up being depends on the machine you're
634 sa1100_ports[i].port.uartclk = 3686400;
635 sa1100_ports[i].port.ops = &sa1100_pops;
636 sa1100_ports[i].port.fifosize = 8;
637 sa1100_ports[i].port.line = i;
638 sa1100_ports[i].port.iotype = UPIO_MEM;
643 * make transmit lines outputs, so that when the port
664 void __init sa1100_register_uart(int idx, int port)
671 switch (port) {
673 sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
674 sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
675 sa1100_ports[idx].port.irq = IRQ_Ser1UART;
676 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
680 sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
681 sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
682 sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
683 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
687 sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
688 sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
689 sa1100_ports[idx].port.irq = IRQ_Ser3UART;
690 sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
694 printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
700 static void sa1100_console_putchar(struct uart_port *port, int ch)
703 container_of(port, struct sa1100_port, port);
726 uart_console_write(&sport->port, s, count, sa1100_console_putchar);
739 * If the port was already initialised (eg, by a boot loader),
750 /* ok, the port was enabled */
770 *baud = sport->port.uartclk / (16 * (quot + 1));
785 * if so, search for the first available port that does have
797 return uart_set_options(&sport->port, co, baud, parity, bits, flow);
839 uart_suspend_port(&sa1100_reg, &sport->port);
849 uart_resume_port(&sa1100_reg, &sport->port);
856 sport->port.dev = &dev->dev;
857 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_SA1100_CONSOLE);
862 sport->gpios = mctrl_gpio_init_noauto(sport->port.dev, 0);
866 dev_err(sport->port.dev, "failed to get mctrl gpios: %d\n",
877 return uart_add_one_port(&sa1100_reg, &sport->port);
890 if (sa1100_ports[i].port.mapbase == res->start)
905 uart_remove_one_port(&sa1100_reg, &sport->port);
947 MODULE_DESCRIPTION("SA1100 generic serial port driver");