Lines Matching refs:up
51 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
54 return readl(up->port.membase + offset);
57 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
60 writel(value, up->port.membase + offset);
65 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
67 up->ier |= UART_IER_MSI;
68 serial_out(up, UART_IER, up->ier);
73 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
75 if (up->ier & UART_IER_THRI) {
76 up->ier &= ~UART_IER_THRI;
77 serial_out(up, UART_IER, up->ier);
83 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
85 up->ier &= ~UART_IER_RLSI;
86 up->port.read_status_mask &= ~UART_LSR_DR;
87 serial_out(up, UART_IER, up->ier);
90 static inline void receive_chars(struct uart_pxa_port *up, int *status)
103 up->ier &= ~UART_IER_RTOIE;
104 serial_out(up, UART_IER, up->ier);
106 ch = serial_in(up, UART_RX);
108 up->port.icount.rx++;
117 up->port.icount.brk++;
124 if (uart_handle_break(&up->port))
127 up->port.icount.parity++;
129 up->port.icount.frame++;
131 up->port.icount.overrun++;
136 *status &= up->port.read_status_mask;
139 if (up->port.line == up->port.cons->index) {
141 *status |= up->lsr_break_flag;
142 up->lsr_break_flag = 0;
153 if (uart_handle_sysrq_char(&up->port, ch))
156 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
159 *status = serial_in(up, UART_LSR);
161 tty_flip_buffer_push(&up->port.state->port);
170 up->ier |= UART_IER_RTOIE;
171 serial_out(up, UART_IER, up->ier);
174 static void transmit_chars(struct uart_pxa_port *up)
176 struct circ_buf *xmit = &up->port.state->xmit;
179 if (up->port.x_char) {
180 serial_out(up, UART_TX, up->port.x_char);
181 up->port.icount.tx++;
182 up->port.x_char = 0;
185 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
186 serial_pxa_stop_tx(&up->port);
190 count = up->port.fifosize / 2;
192 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
194 up->port.icount.tx++;
200 uart_write_wakeup(&up->port);
204 serial_pxa_stop_tx(&up->port);
209 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
211 if (!(up->ier & UART_IER_THRI)) {
212 up->ier |= UART_IER_THRI;
213 serial_out(up, UART_IER, up->ier);
217 /* should hold up->port.lock */
218 static inline void check_modem_status(struct uart_pxa_port *up)
222 status = serial_in(up, UART_MSR);
228 up->port.icount.rng++;
230 up->port.icount.dsr++;
232 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
234 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
236 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
244 struct uart_pxa_port *up = dev_id;
247 iir = serial_in(up, UART_IIR);
250 spin_lock(&up->port.lock);
251 lsr = serial_in(up, UART_LSR);
253 receive_chars(up, &lsr);
254 check_modem_status(up);
256 transmit_chars(up);
257 spin_unlock(&up->port.lock);
263 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
267 spin_lock_irqsave(&up->port.lock, flags);
268 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
269 spin_unlock_irqrestore(&up->port.lock, flags);
276 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
280 status = serial_in(up, UART_MSR);
296 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
310 mcr |= up->mcr;
312 serial_out(up, UART_MCR, mcr);
317 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
320 spin_lock_irqsave(&up->port.lock, flags);
322 up->lcr |= UART_LCR_SBC;
324 up->lcr &= ~UART_LCR_SBC;
325 serial_out(up, UART_LCR, up->lcr);
326 spin_unlock_irqrestore(&up->port.lock, flags);
331 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
336 up->mcr |= UART_MCR_AFE;
338 up->mcr = 0;
340 up->port.uartclk = clk_get_rate(up->clk);
345 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
353 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
354 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
356 serial_out(up, UART_FCR, 0);
361 (void) serial_in(up, UART_LSR);
362 (void) serial_in(up, UART_RX);
363 (void) serial_in(up, UART_IIR);
364 (void) serial_in(up, UART_MSR);
369 serial_out(up, UART_LCR, UART_LCR_WLEN8);
371 spin_lock_irqsave(&up->port.lock, flags);
372 up->port.mctrl |= TIOCM_OUT2;
373 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
374 spin_unlock_irqrestore(&up->port.lock, flags);
381 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
382 serial_out(up, UART_IER, up->ier);
387 (void) serial_in(up, UART_LSR);
388 (void) serial_in(up, UART_RX);
389 (void) serial_in(up, UART_IIR);
390 (void) serial_in(up, UART_MSR);
397 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
400 free_irq(up->port.irq, up);
405 up->ier = 0;
406 serial_out(up, UART_IER, 0);
408 spin_lock_irqsave(&up->port.lock, flags);
409 up->port.mctrl &= ~TIOCM_OUT2;
410 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
411 spin_unlock_irqrestore(&up->port.lock, flags);
416 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
417 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
420 serial_out(up, UART_FCR, 0);
427 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
462 if ((up->port.uartclk / quot) < (2400 * 16))
464 else if ((up->port.uartclk / quot) < (230400 * 16))
473 spin_lock_irqsave(&up->port.lock, flags);
479 up->ier |= UART_IER_UUE;
486 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
488 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
490 up->port.read_status_mask |= UART_LSR_BI;
495 up->port.ignore_status_mask = 0;
497 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
499 up->port.ignore_status_mask |= UART_LSR_BI;
505 up->port.ignore_status_mask |= UART_LSR_OE;
512 up->port.ignore_status_mask |= UART_LSR_DR;
517 up->ier &= ~UART_IER_MSI;
518 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
519 up->ier |= UART_IER_MSI;
521 serial_out(up, UART_IER, up->ier);
524 up->mcr |= UART_MCR_AFE;
526 up->mcr &= ~UART_MCR_AFE;
528 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
529 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
535 dll = serial_in(up, UART_DLL);
538 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
539 serial_out(up, UART_LCR, cval); /* reset DLAB */
540 up->lcr = cval; /* Save LCR */
541 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
542 serial_out(up, UART_FCR, fcr);
543 spin_unlock_irqrestore(&up->port.lock, flags);
550 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
553 clk_prepare_enable(up->clk);
555 clk_disable_unprepare(up->clk);
569 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
570 up->port.type = PORT_PXA;
583 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
584 return up->name;
597 static void wait_for_xmitr(struct uart_pxa_port *up)
601 /* Wait up to 10ms for the character(s) to be sent. */
603 status = serial_in(up, UART_LSR);
606 up->lsr_break_flag = UART_LSR_BI;
613 /* Wait up to 1s for flow control if necessary */
614 if (up->port.flags & UPF_CONS_FLOW) {
617 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
624 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
626 wait_for_xmitr(up);
627 serial_out(up, UART_TX, ch);
639 struct uart_pxa_port *up = serial_pxa_ports[co->index];
644 clk_enable(up->clk);
646 if (up->port.sysrq)
649 locked = spin_trylock(&up->port.lock);
651 spin_lock(&up->port.lock);
656 ier = serial_in(up, UART_IER);
657 serial_out(up, UART_IER, UART_IER_UUE);
659 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
665 wait_for_xmitr(up);
666 serial_out(up, UART_IER, ier);
669 spin_unlock(&up->port.lock);
671 clk_disable(up->clk);
683 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
684 unsigned char lsr = serial_in(up, UART_LSR);
687 lsr = serial_in(up, UART_LSR);
689 return serial_in(up, UART_RX);
697 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
702 ier = serial_in(up, UART_IER);
703 serial_out(up, UART_IER, UART_IER_UUE);
705 wait_for_xmitr(up);
709 serial_out(up, UART_TX, c);
715 wait_for_xmitr(up);
716 serial_out(up, UART_IER, ier);
724 struct uart_pxa_port *up;
732 up = serial_pxa_ports[co->index];
733 if (!up)
739 return uart_set_options(&up->port, co, baud, parity, bits, flow);