Lines Matching defs:membase
209 void __iomem *membase;
243 /* protect the eg20t_port private structure and io access to membase */
319 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
321 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
323 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
325 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
327 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
329 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
332 ioread8(priv->membase + PCH_UART_BRCSR));
334 lcr = ioread8(priv->membase + UART_LCR);
335 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
337 "DLL: \t0x%02x\n", ioread8(priv->membase + UART_DLL));
339 "DLM: \t0x%02x\n", ioread8(priv->membase + UART_DLM));
340 iowrite8(lcr, priv->membase + UART_LCR);
422 u8 ier = ioread8(priv->membase + UART_IER);
424 iowrite8(ier, priv->membase + UART_IER);
430 u8 ier = ioread8(priv->membase + UART_IER);
432 iowrite8(ier, priv->membase + UART_IER);
472 iowrite8(PCH_UART_LCR_DLAB, priv->membase + UART_LCR);
473 iowrite8(dll, priv->membase + PCH_UART_DLL);
474 iowrite8(dlm, priv->membase + PCH_UART_DLM);
475 iowrite8(lcr, priv->membase + UART_LCR);
489 iowrite8(PCH_UART_FCR_FIFOE | priv->fcr, priv->membase + UART_FCR);
491 priv->membase + UART_FCR);
492 iowrite8(priv->fcr, priv->membase + UART_FCR);
541 iowrite8(PCH_UART_FCR_FIFOE, priv->membase + UART_FCR);
543 priv->membase + UART_FCR);
544 iowrite8(fcr, priv->membase + UART_FCR);
552 unsigned int msr = ioread8(priv->membase + UART_MSR);
565 iowrite8(thr, priv->membase + PCH_UART_THR);
576 lsr = ioread8(priv->membase + UART_LSR);
577 for (i = 0, lsr = ioread8(priv->membase + UART_LSR);
579 lsr = ioread8(priv->membase + UART_LSR)) {
580 rbr = ioread8(priv->membase + PCH_UART_RBR);
597 return ioread8(priv->membase + UART_IIR) &\
603 return ioread8(priv->membase + UART_LSR);
610 lcr = ioread8(priv->membase + UART_LCR);
616 iowrite8(lcr, priv->membase + UART_LCR);
1195 iowrite8(mcr, priv->membase + UART_MCR);
1427 pci_iounmap(priv->pdev, priv->membase);
1435 void __iomem *membase;
1442 membase = pci_iomap(priv->pdev, 1, 0);
1443 if (!membase) {
1447 priv->membase = port->membase = membase;
1503 status = ioread8(up->membase + UART_LSR);
1516 unsigned int msr = ioread8(up->membase + UART_MSR);
1535 u8 lsr = ioread8(priv->membase + UART_LSR);
1540 return ioread8(priv->membase + PCH_UART_RBR);
1554 ier = ioread8(priv->membase + UART_IER);
1561 iowrite8(c, priv->membase + PCH_UART_THR);
1568 iowrite8(ier, priv->membase + UART_IER);
1604 iowrite8(ch, priv->membase + PCH_UART_THR);
1643 ier = ioread8(priv->membase + UART_IER);
1654 iowrite8(ier, priv->membase + UART_IER);
1680 if (!port || (!port->iobase && !port->membase))
1775 priv->port.membase = NULL;