Lines Matching defs:UART_INTR
148 #define UART_INTR(port) (to_mvuart(port)->data->regs.intr)
186 unsigned int ctl = readl(port->membase + UART_INTR(port));
189 writel(ctl, port->membase + UART_INTR(port));
203 ctl = readl(port->membase + UART_INTR(port));
205 writel(ctl, port->membase + UART_INTR(port));
216 ctl = readl(port->membase + UART_INTR(port));
218 writel(ctl, port->membase + UART_INTR(port));
402 ctl = readl(port->membase + UART_INTR(port));
404 writel(ctl, port->membase + UART_INTR(port));
447 writel(0, port->membase + UART_INTR(port));
695 intr = readl(port->membase + UART_INTR(port)) &
698 writel(0, port->membase + UART_INTR(port));
708 ctl = intr | readl(port->membase + UART_INTR(port));
709 writel(ctl, port->membase + UART_INTR(port));
784 mvuart->pm_regs.intr = readl(port->membase + UART_INTR(port));
802 writel(mvuart->pm_regs.intr, port->membase + UART_INTR(port));