Lines Matching defs:uart
171 struct uart_port uart;
183 #define UART_TO_MSM(uart_port) container_of(uart_port, struct msm_port, uart)
273 msm_stop_dma(&msm_port->uart, dma);
281 msm_stop_dma(&msm_port->uart, dma);
291 struct device *dev = msm_port->uart.dev;
334 struct device *dev = msm_port->uart.dev;
425 struct uart_port *port = &msm_port->uart;
474 struct circ_buf *xmit = &msm_port->uart.state->xmit;
475 struct uart_port *port = &msm_port->uart;
535 struct uart_port *port = &msm_port->uart;
598 struct uart_port *uart = &msm_port->uart;
608 dma->phys = dma_map_single(uart->dev, dma->virt,
610 ret = dma_mapping_error(uart->dev, dma->phys);
640 msm_write(uart, msm_port->imr, UART_IMR);
646 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
647 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
649 val = msm_read(uart, UARTDM_DMEN);
653 msm_write(uart, val, UARTDM_DMEN);
655 msm_write(uart, UARTDM_RX_SIZE, UARTDM_DMRX);
658 msm_write(uart, val, UARTDM_DMEN);
662 dma_unmap_single(uart->dev, dma->phys, UARTDM_RX_SIZE, dma->dir);
669 msm_write(uart, UART_CR_CMD_RESET_RX, UART_CR);
670 msm_write(uart, UART_CR_RX_ENABLE, UART_CR);
672 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
673 msm_write(uart, 0xFFFFFF, UARTDM_DMRX);
674 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
678 msm_write(uart, msm_port->imr, UART_IMR);
881 struct circ_buf *xmit = &msm_port->uart.state->xmit;
1220 msm_request_tx_dma(msm_port, msm_port->uart.mapbase);
1221 msm_request_rx_dma(msm_port, msm_port->uart.mapbase);
1557 .uart = {
1566 .uart = {
1575 .uart = {
1589 return &msm_uart_ports[line].uart;
1722 OF_EARLYCON_DECLARE(msm_serial, "qcom,msm-uart",
1852 { .compatible = "qcom,msm-uart" },
1862 uart_suspend_port(&msm_uart_driver, &port->uart);
1871 uart_resume_port(&msm_uart_driver, &port->uart);