Lines Matching defs:UART_CR
59 #define UART_CR 0x0010
391 msm_write(port, UART_CR_CMD_RESET_TX_READY, UART_CR);
449 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
450 msm_write(port, UART_CR_TX_ENABLE, UART_CR);
555 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
646 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
647 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
669 msm_write(uart, UART_CR_CMD_RESET_RX, UART_CR);
670 msm_write(uart, UART_CR_RX_ENABLE, UART_CR);
672 msm_write(uart, UART_CR_CMD_RESET_STALE_INT, UART_CR);
674 msm_write(uart, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
712 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
769 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
771 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
790 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
936 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
956 msm_write(port, UART_CR_CMD_RESET_RXBREAK_START, UART_CR);
962 msm_write(port, val, UART_CR);
964 msm_write(port, val, UART_CR);
1003 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR);
1004 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
1005 msm_write(port, UART_CR_CMD_RESET_ERR, UART_CR);
1006 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR);
1007 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
1008 msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR);
1027 msm_write(port, UART_CR_CMD_RESET_RFR, UART_CR);
1037 msm_write(port, UART_CR_CMD_START_BREAK, UART_CR);
1039 msm_write(port, UART_CR_CMD_STOP_BREAK, UART_CR);
1159 msm_write(port, UART_CR_CMD_PROTECTION_EN, UART_CR);
1163 msm_write(port, UART_CR_TX_ENABLE | UART_CR_RX_ENABLE, UART_CR);
1172 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
1174 msm_write(port, UART_CR_CMD_STALE_EVENT_ENABLE, UART_CR);
1461 msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR);
1465 msm_write(port, UART_CR_CMD_RESET_STALE_INT, UART_CR);
1468 UART_CR);