Lines Matching defs:psc_ops
84 struct psc_ops {
342 static const struct psc_ops mpc52xx_psc_ops = {
372 static const struct psc_ops mpc5200b_psc_ops = {
965 static const struct psc_ops mpc5125_psc_ops = {
1000 static const struct psc_ops mpc512x_psc_ops = {
1037 static const struct psc_ops *psc_ops;
1046 return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
1052 psc_ops->set_rts(port, mctrl & TIOCM_RTS);
1059 u8 status = psc_ops->get_ipcr(port);
1073 psc_ops->stop_tx(port);
1080 psc_ops->start_tx(port);
1087 psc_ops->stop_rx(port);
1093 psc_ops->enable_ms(port);
1103 psc_ops->command(port, MPC52xx_PSC_START_BRK);
1105 psc_ops->command(port, MPC52xx_PSC_STOP_BRK);
1115 if (psc_ops->clock) {
1116 ret = psc_ops->clock(port, 1);
1128 psc_ops->command(port, MPC52xx_PSC_RST_RX);
1129 psc_ops->command(port, MPC52xx_PSC_RST_TX);
1138 psc_ops->set_sicr(port, 0); /* UART mode DCD ignored */
1140 psc_ops->fifo_init(port);
1142 psc_ops->command(port, MPC52xx_PSC_TX_ENABLE);
1143 psc_ops->command(port, MPC52xx_PSC_RX_ENABLE);
1152 psc_ops->command(port, MPC52xx_PSC_RST_RX);
1154 psc_ops->command(port, MPC52xx_PSC_RST_TX);
1157 psc_ops->set_imr(port, port->read_status_mask);
1159 if (psc_ops->clock)
1160 psc_ops->clock(port, 0);
1163 psc_ops->cw_disable_ints(port);
1236 psc_ops->command(port, MPC52xx_PSC_RST_RX);
1237 psc_ops->command(port, MPC52xx_PSC_RST_TX);
1240 psc_ops->set_mode(port, mr1, mr2);
1241 baud = psc_ops->set_baudrate(port, new, old);
1250 psc_ops->command(port, MPC52xx_PSC_TX_ENABLE);
1251 psc_ops->command(port, MPC52xx_PSC_RX_ENABLE);
1270 if (psc_ops->clock_relse)
1271 psc_ops->clock_relse(port);
1300 if (psc_ops->clock_alloc) {
1301 err = psc_ops->clock_alloc(port);
1376 while (psc_ops->raw_rx_rdy(port)) {
1378 ch = psc_ops->read_char(port);
1389 status = psc_ops->get_status(port);
1409 psc_ops->command(port, MPC52xx_PSC_RST_ERR_STAT);
1428 return psc_ops->raw_rx_rdy(port);
1438 psc_ops->write_char(port, port->x_char);
1451 while (psc_ops->raw_tx_rdy(port)) {
1452 psc_ops->write_char(port, xmit->buf[xmit->tail]);
1484 psc_ops->rx_clr_irq(port);
1485 if (psc_ops->rx_rdy(port))
1488 psc_ops->tx_clr_irq(port);
1489 if (psc_ops->tx_rdy(port))
1492 status = psc_ops->get_ipcr(port);
1516 ret = psc_ops->handle_irq(port);
1538 mr1 = psc_ops->get_mr1(port);
1572 psc_ops->cw_disable_ints(port);
1583 psc_ops->write_char(port, '\r');
1586 psc_ops->write_char(port, *s);
1595 psc_ops->cw_restore_ints(port);
1784 psc_ops->get_irq(port, op->dev.of_node);
1866 psc_ops = match->data;
1918 if (psc_ops && psc_ops->fifoc_init) {
1919 ret = psc_ops->fifoc_init();
1933 if (psc_ops && psc_ops->fifoc_uninit)
1934 psc_ops->fifoc_uninit();
1943 if (psc_ops->fifoc_uninit)
1944 psc_ops->fifoc_uninit();